Datasheet > CY62136BV18LL-70BAI

CY62136BV18LL-70BAI

更新时间： 2024-09-27 23:45:07

品牌	Logo	应用领域
其他 - ETC		静态存储器
页数	文件大小	规格书
10页	292K
描述
x16 SRAM

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CY62136BV18 MoBL2™

128K x 16 Static RAM

I/O₁₅) are placed in a high-impedance state when: deselected

(CE HIGH), outputs are disabled (OE HIGH), BHE and BLE

are disabled (BHE, BLE HIGH), or during a write operation (CE

LOW, and WE LOW).

Features

• Low voltage range:

— CY62136BV18: 1.75V−1.95V

Writing to the device is accomplished by taking Chip Enable

(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable

(BLE) is LOW, then data from I/O pins (I/O₀through I/O₇), is

written into the location specified on the address pins (A₀

through A₁₆). If Byte High Enable (BHE) is LOW, then data

from I/O pins (I/O₈through I/O₁₅) is written into the location

specified on the address pins (A₀through A₁₆).

• Ultra-low active, standby power

• Easy memory expansion with CE and OE features

• TTL-compatible inputs and outputs

• Automatic power-down when deselected

• CMOS for optimum speed/power

Functional Description

Reading from the device is accomplished by taking Chip En-

able (CE) and Output Enable (OE) LOW while forcing the Write

Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then

data from the memory location specified by the address pins

will appear on I/O₀to I/O₇. If Byte High Enable (BHE) is LOW,

then data from memory will appear on I/O₈to I/O₁₅. See the

Truth Table at the back of this data sheet for a complete de-

scription of read and write modes.

The CY62136BV18 is a high-performance CMOS static RAM

organized as 131,072 words by 16 bits. This device features

advanced circuit design to provide ultra-low active current.

This is ideal for providing More Battery Life™ (MoBL™) in por-

table applications such as cellular telephones. The device also

has an automatic power-down feature that significantly reduc-

es power consumption by 99% when addresses are not tog-

gling. The device can also be put into standby mode when

deselected (CE HIGH). The input/output pins (I/O₀through

The CY62136BV18 is available in 48-ball FBGA packaging.

Logic Block Diagram

DATA IN DRIVERS

128K x 16

RAM Array

1024 X 2048

I/O –I/O

COLUMN DECODER

BHE

BLE

MoBL2 and More Battery Life are trademarks of Cypress Semiconductor Corporation.

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

October 10, 2000

12 3 4 5 6 7...10

中文翻译

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与CY62136BV18LL-70BAI相关器件

型号	品牌	获取价格	描述	数据表
CY62136CV	CYPRESS	获取价格	2-Mbit (128K x 16) Static RAM
CY62136CV18	CYPRESS	获取价格	128K x 16 Static RAM
CY62136CV18LL-55BAI	CYPRESS	获取价格	128K x 16 Static RAM
CY62136CV18LL-55BVI	CYPRESS	获取价格	128K x 16 Static RAM
CY62136CV18LL-70BAI	CYPRESS	获取价格	128K x 16 Static RAM
CY62136CV18LL-70BAIT	CYPRESS	获取价格	Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
CY62136CV18LL-70BVI	CYPRESS	获取价格	128K x 16 Static RAM
CY62136CV30	CYPRESS	获取价格	2M (128K x 16) Static RAM
CY62136CV30_06	CYPRESS	获取价格	2-Mbit (128K x 16) Static RAM
CY62136CV30LL-55BAI	CYPRESS	获取价格	2M (128K x 16) Static RAM

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