5秒后页面跳转
CY2XP21ZXIT PDF预览

CY2XP21ZXIT

更新时间: 2024-01-12 01:24:43
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 晶体时钟发生器微控制器和处理器外围集成电路光电二极管
页数 文件大小 规格书
7页 224K
描述
125 MHz LVPECL Clock Generator

CY2XP21ZXIT 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:TSSOP,
针数:8Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.77Is Samacsys:N
其他特性:ALSO OPERATES WITH 3.3V SUPPLYJESD-30 代码:R-PDSO-G8
长度:4.4 mm湿度敏感等级:3
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:140 MHz
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
主时钟/晶体标称频率:28 MHz认证状态:Not Qualified
座面最大高度:1.1 mm最大供电电压:2.625 V
最小供电电压:2.375 V标称供电电压:2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:3 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

CY2XP21ZXIT 数据手册

 浏览型号CY2XP21ZXIT的Datasheet PDF文件第2页浏览型号CY2XP21ZXIT的Datasheet PDF文件第3页浏览型号CY2XP21ZXIT的Datasheet PDF文件第4页浏览型号CY2XP21ZXIT的Datasheet PDF文件第5页浏览型号CY2XP21ZXIT的Datasheet PDF文件第6页浏览型号CY2XP21ZXIT的Datasheet PDF文件第7页 
PRELIMINARY  
CY2XP21  
125 MHz LVPECL Clock Generator  
Features  
Functional Description  
One LVPECL Output Pair  
The CY2XP21 is a PLL (Phase Locked Loop) based high  
performance clock generator. It is optimized to generate a  
125 MHz clock, which is ideal for 10 Gb Ethernet applications. It  
also produces an output frequency that is five times the crystal  
frequency. It uses Cypress’s low noise VCO technology to  
achieve less than 1 ps typical RMS phase jitter. The CY2XP21  
has a crystal oscillator interface input and one LVPECL output  
pair.  
Output Frequency: 112 MHz to 140 MHz  
External Crystal Frequency: 22.4 MHz to 28 MHz  
Low RMS Phase Jitter at 125 MHz, using 25 MHz Crystal  
(1.875 MHz to 20 MHz): 0.4 ps (Typical)  
Pb-free 8-Pin TSSOP Package  
Supply Voltage: 3.3V or 2.5V  
Commercial and Industrial Temperature Ranges  
Logic Block Diagram  
XIN  
External  
Crystal  
CLK  
CRYSTAL  
OSCILLATOR  
LOW -N OISE  
PLL  
OUTPUT  
DIVIDER  
CLK#  
XOUT  
Pinouts  
Figure 1. Pin Diagram - 8-Pin TSSOP  
VDD  
VSS  
XOUT  
XIN  
1
2
3
4
8
7
6
5
VDD  
CLK  
CLK#  
NC  
Table 1. Pin Definition - 8-Pin TSSOP  
Pin Number  
Pin Name  
VDD  
I/O Type  
Description  
1, 8  
2
Power  
Power  
3.3V or 2.5V power supply  
Ground  
VSS  
3, 4  
5
XOUT, XIN  
NC  
XTAL output and input  
Parallel resonant crystal interface  
No Connect  
6,7  
CLK#, CLK  
LVPECL output  
Differential Clock Output  
Cypress Semiconductor Corporation  
Document #: 001-52849 Rev. *A  
198 Champion Court  
San Jose  
,
CA 95134-1709  
408-943-2600  
Revised June 15, 2009  
[+] Feedback  

与CY2XP21ZXIT相关器件

型号 品牌 获取价格 描述 数据表
CY2XP22 CYPRESS

获取价格

Crystal to LVPECL Clock Generator One LVPECL output pair
CY2XP22_11 CYPRESS

获取价格

Crystal to LVPECL Clock Generator One LVPECL output pair
CY2XP22ZXC CYPRESS

获取价格

Crystal to LVPECL Clock Generator
CY2XP22ZXCT CYPRESS

获取价格

Crystal to LVPECL Clock Generator
CY2XP22ZXI CYPRESS

获取价格

Crystal to LVPECL Clock Generator
CY2XP22ZXIT CYPRESS

获取价格

Crystal to LVPECL Clock Generator
CY2XP24 CYPRESS

获取价格

Crystal to LVPECL Clock Generator One LVPECL Output Pair
CY2XP24_11 CYPRESS

获取价格

Crystal to LVPECL Clock Generator One LVPECL Output Pair
CY2XP24ZXC CYPRESS

获取价格

Crystal to LVPECL Clock Generator
CY2XP24ZXCT CYPRESS

获取价格

Crystal to LVPECL Clock Generator