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CY2V014FLXIT PDF预览

CY2V014FLXIT

更新时间: 2024-11-19 20:06:19
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟外围集成电路
页数 文件大小 规格书
9页 192K
描述
Clock Generator, 690MHz, CMOS, CDSO6, 3.20 X 5 MM, LEAD FREE, CERAMIC, LCC-6

CY2V014FLXIT 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DLCC包装说明:3.20 X 5 MM, LEAD FREE, CERAMIC, LCC-6
针数:6Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.31.00.01
风险等级:5.76JESD-30 代码:R-CDSO-N6
JESD-609代码:e4长度:5 mm
湿度敏感等级:3端子数量:6
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:690 MHz封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:LSON封装等效代码:SOLCC6,.12
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, LOW PROFILE
电源:2.5/3.3 V认证状态:Not Qualified
座面最大高度:1.3 mm子类别:Clock Generators
最大压摆率:100 mA最大供电电压:2.75 V
最小供电电压:2.25 V标称供电电压:2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Gold (Ni/Au)
端子形式:NO LEAD端子节距:1.27 mm
端子位置:DUAL宽度:3.2 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

CY2V014FLXIT 数据手册

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CY2V014  
LVPECL Voltage Controlled  
Crystal Oscillator (VCXO)  
Features  
Benefits  
High-frequency VCXO with LVPECL output  
Any output frequency from 50 MHz to 690 MHz  
Available either factory configured or field programmable  
Integrated phase-locked loop (PLL)  
Eliminates the need for external crystal  
Low-noise internal PLL  
Fast time to market  
Suitable for HDDs, consumer and networking applications  
Small footprint  
1 ps typical RMS Phase Jitter  
Output Enable or Power-down function  
Supply voltage: 3.3 V or 2.5 V  
Application compatibility in standard and low-power systems  
Field-programmable for reduced inventory  
Pb-free package: 5.0 × 3.2 mm LCC  
Commercial and industrial temperature ranges  
Logic Block Diagram  
Low Noise  
PLL  
Crystal  
Oscillator  
4
PROGRAMMABLE  
CONFIGURATION  
CLK  
OUTPUT  
DIVIDER  
5
1
CLK#  
VIN  
2
Pull-up  
OE/PD#  
6
3
VDD  
VSS  
Cypress Semiconductor Corporation  
Document #: 001-06458 Rev. *B  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised December 2, 2010  
[+] Feedback  

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