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CY28RS480ZXC

更新时间： 2024-02-23 14:16:34

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		时钟发生器
页数	文件大小	规格书
15页	218K
描述
Clock Generator for ATI RS480 Chipset

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中文翻译

获取价格

数据手册

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CY28RS480ZXC 数据手册

CY28RS480

Clock Generator for ATI^RS480 Chipset

• I²C support with readback capabilities

Features

• Ideal Lexmark Spread Spectrum profile for maximum

• Supports AMD^CPU

electromagnetic interference (EMI) reduction

• 200-MHz differential CPU clock pairs

• 100-MHz differential SRC clocks

• 48-MHz USB clock

• 33-MHz PCI clock

• 66-MHz HyperTransport clock

• 3.3V power supply

• 56-pin SSOP and TSSOP packages

CPU

SRC

HTT66

PCI

REF

x 3

USB_48

x 1

Block Diagram

Pin Configuration

VDD_REF

REF[0:2]

XIN

XOUT

VDD_REF

VSS_REF

REF0

XIN

XTAL

OSC

XOUT

PLL Ref Freq

VDD_48

USB_48

VSS_48

VDD_CPU

CPUT[0:1], CPUC[0:1],

REF1

Divider

CPU_STP#

CLKREQ[0:1]#

PLL1

REF2

Network

VDD_SRC

SRCT[0:5],SRCC[0:5]

VDD_PCI

PCI0

SCLK

VDD_SRCS

SDATA

VSS_PCI

VDD_HTT

HTT66

SRCST[0:1],SRCSC[0:1]

IREF

CLKREQ#0

CLKREQ#1

SRCT5

VDD_PCI

PCI

VSS_HTT

CPUT0

CPUC0

VDD_CPU

VSS_CPU

CPUT1

CPUC1

VDDA

VDD_HTT

HTT66

SRCC5

VDD_SRC

VSS_SRC

SRCT4

VDD_48 MHz

SRCC4

SRCT3

PLL2

USB_48

SRCC3

VSS_SRC

VDD_SRC

SRCT2

VSSA

IREF

VSS_SRC1

VDD_SRC1

SRCT0

SRCC2

SRCT1

SRCC0

SRCC1

VSS_SRC

SRCST1

SRCSC1

VDD_SRCS

VSS_SRCS

SRCST0

SDATA

SCLK

I C

Logic

SRCSC0

56 SSOP/TSSOP

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose, CA 95134

•

408-943-2600

Document #: 38-07638 Rev. *C

Revised February 21, 2005

12 3 4 5 6 7...15

中文翻译

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