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CY28RS480ZXC-1 PDF预览

CY28RS480ZXC-1

更新时间: 2024-11-02 04:38:03
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟发生器
页数 文件大小 规格书
16页 232K
描述
Clock Generator for ATI RS480 Chipset

CY28RS480ZXC-1 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP,
针数:56Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.22JESD-30 代码:R-PDSO-G56
JESD-609代码:e4长度:13.9955 mm
湿度敏感等级:1端子数量:56
最高工作温度:70 °C最低工作温度:
最大输出时钟频率:200 MHz封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
主时钟/晶体标称频率:14.31818 MHz认证状态:Not Qualified
座面最大高度:1.1 mm最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:20
宽度:6.096 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches:1

CY28RS480ZXC-1 数据手册

 浏览型号CY28RS480ZXC-1的Datasheet PDF文件第2页浏览型号CY28RS480ZXC-1的Datasheet PDF文件第3页浏览型号CY28RS480ZXC-1的Datasheet PDF文件第4页浏览型号CY28RS480ZXC-1的Datasheet PDF文件第5页浏览型号CY28RS480ZXC-1的Datasheet PDF文件第6页浏览型号CY28RS480ZXC-1的Datasheet PDF文件第7页 
PRELIMINARY  
CY28RS480-1  
Clock Generator for ATIRS480 Chipset  
• 66-MHz HyperTransportclock  
Features  
• I2C support with readback capabilities  
• Supports AMDCPU  
• Ideal Lexmark Spread Spectrum profile for maximum  
• Selectable CPU frequencies  
• 200-MHz differential CPU clock pairs  
• 100-MHz differential SRC clocks  
• 48-MHz USB clock  
electromagnetic interference (EMI) reduction  
• 3.3V power supply  
• 56-pin SSOP and TSSOP packages  
CPU  
x2  
SRC  
x8  
HTT66  
x1  
PCI  
x1  
REF  
x 3  
USB_48  
x 1  
• 33-MHz PCI clock  
Block Diagram  
Pin Configuration  
VDD_REF  
REF[0:2]  
XIN  
XTAL  
OSC  
XOUT  
PLL Ref Freq  
XIN  
XOUT  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
VDD_REF  
VSS_REF  
REF0  
2
VDD_CPU  
CPUT[0:2], CPUC[0:2],  
VDD_48  
USB_48  
VSS_48  
CLK_STOP  
SCLK  
3
Divider  
CPU_STP#  
CLKREQ[0:1]#  
PLL1  
Network  
4
REF1  
VDD_SRC  
SRCT[0:6],SRCC[0:6]  
5
REF2  
6
VDD_PCI  
PCI0  
VDD_SRCS  
7
SRCST[0:1],SRCSC[0:1]  
IREF  
PD  
SDATA  
8
VSS_PCI  
VDD_HTT  
HTT66  
NC  
9
VDD_PCI  
PCI  
CLKREQ#0  
CLKREQ#1  
SRCT5  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
VSS_HTT  
CPUT0  
CPUC0  
VDD_CPU  
VSS_CPU  
CPUT1  
CPUC1  
VDDA  
VDD_HTT  
HTT66  
SRCC5  
VDD_SRC  
VSS_SRC  
SRCT4  
VDD_48 MHz  
SRCC4  
PLL2  
SRCT3  
USB_48  
SRCC3  
VSSA  
VSS_SRC  
VDD_SRC  
SRCT2  
IREF  
VSS_SRC  
VDD_SRC  
SRCT0  
SRCC0  
SRCC2  
SRCT1  
SRCC1  
VDD_SRC1  
VSS_SRC1  
SRCST0  
VSS_SRC  
SRCST1  
SRCSC1  
2
SDATA  
SCLK  
I C  
Logic  
SRCSC0  
56 SSOP/TSSOP  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose, CA 95134  
408-943-2600  
Document #: 38-07714 Rev. *C  
Revised August 4, 2005  

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