CY28405OC

更新时间： 2024-02-14 12:06:47

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		晶体时钟发生器微控制器和处理器外围集成电路光电二极管
页数	文件大小	规格书
19页	260K
描述
CK409-Compliant Clock Synthesizer

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中文翻译

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技术参数
数据手册

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CY28405OC 技术参数

是否无铅：	不含铅	生命周期：	Active
零件包装代码：	SSOP	针数：	48
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.27
Is Samacsys：	N	Base Number Matches：	1

CY28405OC 数据手册

CY28405

CK409-Compliant Clock Synthesizer

• Three differential CPU clock pairs

• Dial-A-Frequency^®

Features

• Supports Intel^Springdale/Prescott (CK409)

• Selectable CPU frequencies

• 3.3V power supply

• Supports SMBus/I²C Byte, Word, and Block Read/Write

• Ideal Lexmark Spread Spectrum profile for maximum

electromagnetic interference (EMI) reduction

• Nine copies of PCI clock

• 48-pin SSOP package

• Four copies 3V66 clock with one optional VCH

• Two copies 48-MHz USB clock

• Two copies REF clock

CPU

x 3

3V66

x 4

PCI

x 9

REF

x 2

48M

x 2

Block Diagram

Pin Configuration

**FS_A/REF_0

VDDA

**FS_B/REF_1

VDD_REF

XIN

VSSA

VDD_REF

IREF

XIN

XOUT

XTAL

OSC

REF[0:1]

CPUT_ITP

CPUC_ITP

VSS_CPU

CPUT1

PLL Ref Freq

XOUT

VDD_CPU

VSS_REF

CPUT[0:1,ITP], CPUC[0:1,ITP]

Divider

*FS_C/PCIF0

PLL 1

Network

*FS_D/PCIF1

*FS_E/PCIF2

VDD_PCI

VSS_PCI

PCI0

CPUC1

VDD_CPU

CPUT0

FS_[A:E]

VTT_PWRGD#

CPUC0

VSS

IREF

PCI1

DNC***

VDD

VDD_3V66

3V66_[0:2]

PCI2

PCI3

VDD_PCI

PCIF[0:2]

VDD_PCI

VSS_PCI

PCI4

VTT_PWRGD#

SDATA

PLL2

SELVCH

PCI[0:5]

SCLK

PCI5

3V66_0

3V66_1

VSS_3V66

VDD_3V66

MODE

RESET#/PD#

DOT_48

USB_48

VSS_48

VDD_48

3V66_3/VCH

3V66_2/MODE*

VDD_48MHz

DOT_48

USB_48

PD#

3V66_3/VCH/SELVCH**

SSOP-48

* 150k Internal Pull-up

** 150k Internal Pull-down

*** Do Not Connect

SDATA

SCLK

I C

RESET#

Logic

Timer

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose, CA 95134

•

408-943-2600

Document #: 38-07512 Rev. *B

Revised June 16, 2004

12 3 4 5 6 7...19

中文翻译

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