Datasheet > CY2300SXC

CY2300SXC

更新时间： 2023-12-06 20:08:18

品牌	Logo	应用领域
英飞凌 - INFINEON		/
页数	文件大小	规格书
13页	425K
描述
3.3V 1:4 Zero Delay Buffer with /2 and X2 Function

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CY2300SXC 数据手册

CY2300

Test Circuits

Figure 2. Test Circuit #1

V_DD

CLK _OUT

C_LOAD

0.1 F

OUTPUTS

GND

Switching Characteristics

Parameter

1/t₁

Description

Output frequency

Test Conditions

18 pF load

Min

–

Typ

–

Max

Unit

MHz

133.33

166.67

12 pF load

–

Duty cycle^[4]= t₂t₁

Rise time^[4]

Measured at V_DD/2

–

t₃

t₄

t₅

Measured between 0.8 V and 2.0 V

1.20

200

Fall time^[4]

–

Output to output skew on rising All outputs equally loaded

–

edges^[4]

Measured at V_DD/2

t₆

Delay, REFIN rising edge to

output rising edge^[4]

Measured at V_DD/2 from REFIN to

any output

–

200

400

Device to device skew^[4]

t₇

Measured at V_DD/2 on the 1/2xREF

pin of devices (pin 1)

Period jitter^[4]

t_J

Measured at Fout = 133.33 MHz,

loaded outputs, 18 pF load

175

1.0

PLL lock time^[4]

t_LOCK

Stable power supply, valid clocks

presented on REFIN

Note

4. All parameters are specified with equally loaded outputs.

Document Number: 38-07252 Rev. *J

Page 5 of 13

1 2 3 456 7 8...13

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