Datasheet > CY14ME064J

CY14ME064J

更新时间： 2024-11-18 09:41:07

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		存储静态存储器
页数	文件大小	规格书
31页	2004K
描述
64-Kbit (8 K x 8) Serial (I2C) nvSRAM Nonvolatile STORE/RECALL

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CY14ME064J 数据手册

CY14MB064J

CY14ME064J

64-Kbit (8 K × 8) Serial (I²C) nvSRAM

64-Kbit (8

K × 8) Serial (I²C) nvSRAM

■ Industry standard configurations

❐ Operating voltages:

Features

■ 64-Kbit nonvolatile static random access memory (nvSRAM)

❐ Internally organized as 8 K × 8

❐ STORE to QuantumTrap nonvolatile elements initiated

automatically on power-down (AutoStore) or by using I²C

command (SoftwareSTORE) orHSBpin(HardwareSTORE)

❐ RECALL to SRAM initiated on power-up (Power-Up

RECALL) or by I²C command (Software RECALL)

❐ Automatic STORE on power-down with a small capacitor

(except for CY14MX064J1)

• CY14MB064J: V_CC= 2.7 V to 3.6 V

• CY14ME064J: V_CC= 4.5 V to 5.5 V

❐ Industrial temperature

❐ 8- and 16-pin small outline integrated circuit (SOIC) package

❐ Restriction of hazardous substances (RoHS) compliant

Overview

The Cypress CY14MB064J/CY14ME064J combines a 64-Kbit

nvSRAM^[1]with a nonvolatile element in each memory cell. The

memory is organized as 8 K words of 8 bits each. The embedded

nonvolatile elements incorporate the QuantumTrap technology,

creating the world’s most reliable nonvolatile memory. The

SRAM provides infinite read and write cycles, while the

QuantumTrap cells provide highly reliable nonvolatile storage of

data. Data transfers from SRAM to the nonvolatile elements

(STORE operation) takes place automatically at power-down

(except for CY14MX064J1). On power-up, data is restored to the

SRAM from the nonvolatile memory (RECALL operation). The

STORE and RECALL operations can also be initiated by the user

through I²C commands.

■ High reliability

❐ Infinite read, write, and RECALL cycles

❐ 1 million STORE cycles to QuantumTrap

❐ Data retention: 20 years at 85 C

■ High speed I²C interface

❐ Industry standard 100 kHz and 400 kHz speed

❐ Fast-mode Plus: 1 MHz speed

❐ High speed: 3.4 MHz

❐ Zero cycle delay reads and writes

■ Write protection

❐ Hardware protection using Write Protect (WP) pin

❐ Software block protection for 1/4, 1/2, or entire array

■ I²C access to special functions

❐ Nonvolatile STORE/RECALL

❐ 8 byte serial number

❐ Manufacturer ID and Product ID

❐ Sleep mode

Configuration

Feature

AutoStore

CY14MX064J1 CY14MX064J2 CY14MX064J3

Yes

Software

STORE

Yes

■ Low power consumption

Hardware

STORE

Yes

❐ Average active current of 1 mA at 3.4 MHz operation

❐ Average standby mode current of 150 µA

❐ Sleep mode current of 8 µA

Slave Address

pins

A2, A1, A0

A2, A1

A2, A1, A0

Logic Block Diagram

Serial Number

8 x 8

V_CCV_CAP

Manufacture ID/

Product ID

Power Control

Block

Memory Control Register

Command Register

Quantrum Trap

8 K x 8

Sleep

STORE

SRAM

8 K x 8

Control Registers Slave

Memory Slave

SDA

SCL

A2, A1, A0

I²C Control Logic

Slave Address

Decoder

Memory

Address and Data

Control

RECALL

Note

1. Serial (I C) nvSRAM is referred to as nvSRAM throughout the datasheet.

Cypress Semiconductor Corporation

Document #: 001- 65051 Rev. *B

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised May 6, 2011

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与CY14ME064J相关器件

型号	品牌	获取价格	描述	数据表
CY14ME064J1A	CYPRESS	获取价格	64-Kbit (8 K x 8) Serial (I2C) nvSRAM
CY14ME064J1A-SXI	CYPRESS	获取价格	64-Kbit (8 K Ã 8) Serial (I2C) nvSRAM
CY14ME064J1A-SXIT	CYPRESS	获取价格	64-Kbit (8 K Ã 8) Serial (I2C) nvSRAM
CY14ME064J1-SXI	CYPRESS	获取价格	64-Kbit (8 K x 8) Serial (I2C) nvSRAM Nonvolatile STORE/RECALL
CY14ME064J1-SXIT	CYPRESS	获取价格	64-Kbit (8 K x 8) Serial (I2C) nvSRAM Nonvolatile STORE/RECALL
CY14ME064J2A	CYPRESS	获取价格	64-Kbit (8 K x 8) Serial (I2C) nvSRAM
CY14ME064J2A-SXI	CYPRESS	获取价格	64-Kbit (8 K Ã 8) Serial (I2C) nvSRAM
CY14ME064J2A-SXIT	CYPRESS	获取价格	64-Kbit (8 K Ã 8) Serial (I2C) nvSRAM
CY14ME064J2-SXI	CYPRESS	获取价格	64-Kbit (8 K x 8) Serial (I2C) nvSRAM Nonvolatile STORE/RECALL
CY14ME064J2-SXIT	CYPRESS	获取价格	64-Kbit (8 K x 8) Serial (I2C) nvSRAM Nonvolatile STORE/RECALL

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