Datasheet > CS200

CS200

更新时间： 2024-10-15 03:26:55

品牌	Logo	应用领域
富士通 - FUJITSU		光电输出元件
页数	文件大小	规格书
2页	604K
描述
65nm CMOS Technology

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CS200 数据手册

65nm CMOS Technology, CS200 / CS200A

Description

As miniaturization of silicon devices progresses,

Fujitsu provides the most competitive, world-class

technology to ASIC and COT customers. Fujitsu's

65nm technology has shrunk gates by 25% when

compared to the 90nm technology.

Fujitsu will start tape-out acceptance for the

technology in early 2006.

Features

• The 30nm long gate, only 75% the size of the

• Transistor density doubled compared with the

90nm generation.

CS100 transistors.

• 20 to 30% faster performance than the 90nm

generation.

• SRAM cell area reduced 50% compared with the

90nm generation.

Specifications

65nm (CS200)

65nm (CS200A)

Gate length

30nm

50nm

Core VDD

1.0V

1.2V

Gate oxide thickness (physical)

Gate electrode

1.1nm

1.7nm

NiSi / Poly-Si

NiSi

CoSi2 / Poly-Si

Source / drain electrode

Interconnects

CoSi2

11-Cu + 1-Al

0.18µm

Metal 1 pitch

Inter-level dielectric

Drain current enhancement

Porous ULK (k = 2.25)

Advanced stress control

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