Datasheet > CS2000-OTP_09

CS2000-OTP_09

更新时间： 2022-12-17 12:52:35

品牌	Logo	应用领域
凌云 - CIRRUS		时钟
页数	文件大小	规格书
30页	251K
描述
Fractional-N Clock Synthesizer & Clock Multiplier

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CS2000-OTP_09 数据手册

CS2000-OTP

Fractional-N Clock Synthesizer & Clock Multiplier

Features

General Description

 Delta-Sigma Fractional-N Frequency Synthesis

The CS2000-OTP is an extremely versatile system

clocking device that utilizes a programmable phase lock

loop. The CS2000-OTP is based on a hybrid analog-

digital PLL architecture comprised of a unique combina-

–

Generates a Low Jitter 6 - 75 MHz Clock

from an 8 - 75 MHz Reference Clock

 Clock Multiplier / Jitter Reduction

tion of

Delta-Sigma Fractional-N Frequency

–

Generates a Low Jitter 6 - 75 MHz Clock

from a Jittery 50 Hz to 30 MHz Clock

Source

Synthesizer and a Digital PLL. This architecture allows

for both frequency synthesis/clock generation from a

stable reference clock as well as generation of a low-jit-

ter clock relative to an external noisy synchronization

clock with frequencies as low as 50 Hz. The CS2000-

OTP has many configuration options which are set once

prior to runtime. At runtime there are three hardware

configuration pins available for mode and feature

selection.

 Highly Accurate PLL Multiplication Factor

–

Maximum Error Less Than 1 PPM in High-

Resolution Mode

 One-Time Programmability

–

Configurable Hardware Control Pins

Configurable Auxiliary Output

The CS2000-OTP is available in a 10-pin MSOP pack-

age in Commercial (-10°C to +70°C) grade. Customer

development kits are also available for custom device

prototyping, small production programming, and device

evaluation. Please see “Ordering Information” on

page 29 for complete details.

 Flexible Sourcing of Reference Clock

–

External Oscillator or Clock Source

Supports Inexpensive Local Crystal

 Minimal Board Space Required

–

No External Analog Loop-filter

Components

3.3 V

Timing Reference

Frequency Reference

Hardware Control

Hardware Configuration

Auxiliary

Output

PLL Output

Lock Indicator

Fractional-N

Frequency Synthesizer

8 MHz to 75 MHz

Low-Jitter Timing Reference

6 to 75 MHz

PLL Output

Output to Input

Clock Ratio

50 Hz to 30 MHz

Frequency Reference

Digital PLL & Fractional

N Logic

Output to Input

Clock Ratio

AUG '09

DS758F1

http://www.cirrus.com

12 3 4 5 6 7...30

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