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CS19201

更新时间: 2022-04-23 23:00:11
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描述
STS-192 SONET/SDH Interleaver/Disinterleaver

CS19201 数据手册

 浏览型号CS19201的Datasheet PDF文件第2页 
Product Brief  
INDUS  
Part Number S19201CAI12, Revision 2.9, March 2003  
STS-192 SONET/SDH Interleaver/Disinterleaver  
The S19201 is a highly-integrated VLSI device that provides for  
the multiplexing and demultiplexing of STS-48/STM-16 SONET/  
SDH signals into an STS-192/STM-64 SONET/SDH signal. When  
used in conjunction with AMCC’s RHINE chip, the INDUS pro-  
vides a channelized OC-192 solution down to STS-48/STS-12/  
STS-3 signal payloads. When used in conjunction with AMCC’s  
MISSOURI and DANUBE chips, the INDUS provides a channel-  
ized OC-192 to STS-48/STS-12/ STS-3/STS-1 framer/pointer pro-  
cessor solution.  
Features  
• Supports the multiplexing and demultiplexing of STS-48/STM-  
16 SONET/SDH signals into an STS-192/STM-64 SONET/SDH  
signal.  
• SONET/SDH low speed side interfaces compatible with  
AMCC’s STS-48/STM-16 devices.  
• Supports the transfer of up to four STS-48/STM-16 data  
streams, carrying any valid combination of STS-48c/AU-4-16c,  
STS-12c/AU-4-4c, or STS-3c/AU-4 SONET/SDH payloads, to  
other AMCC SONET/SDH POS/ATM terminating products.  
The S19201 provides full section and line overhead processing. It  
also provides SONET/SDH framing, scrambling/ descrambling,  
alarm signal insertion/detection, and bit interleaved parity (B1/B2)  
processing.  
• Provisionable for performance monitoring & regeneration.  
Terminates & generates SONET/SDH transport/section over-  
head layers, with TOH/SOH interfaces in both mux and demux  
directions, on the high-speed side.  
The S19201 is SONET/SDH standards compliant with Bellcore  
GR-253, ITU G.707, and ANSI T1.105 -1995.  
A general purpose 16-bit microprocessor interface is provided for  
control, and monitoring. The interface supports both Intel and  
Motorola type microprocessors, and is capable of operating in  
either an interrupt driven or polled-mode configurations.  
• Provides a 622.08 MHz 16-bit bus interface on the High Speed  
line side interface in both the MX and DX directions.  
• Provides four 155.52 MHz 16-bit bus interfaces on the low  
speed line side in both the MX and DX directions.  
7
6
Applications  
• Selectable scrambling/descrambling (X +X +1) of SONET/  
SDH frame.  
ATM switches and Packet over SONET Routers  
• 16-bit synchronous microprocessor interface for configuration,  
control, and status monitoring.  
SONET/SDH Add Drop Multiplexers, Terminal  
Multiplexers and Digital Cross Connects  
• Supports Automatic Protection Switching (APS).  
• 192x192 Cross-connect with STS-1 Level granularity.  
WDM and DWDM  
Test equipment  
Figure 1: Block Diagram  
TOH EXTRACT  
TOH INSERT  
FRGEN192  
MICROPROCESSOR I/F  
MX_CLK_OUT  
MX_CLK_IN_[1:4]  
FRM48  
BUFF  
x4  
Interleaver  
MX_DATA_IN_[1:4]_[15:0]  
MX_DATA_OUT_[15:0]  
X
X
x4  
TOH  
TOH  
MONITOR  
MONITOR  
LBK  
SEL  
DX_DATA_IN_[15:0]  
DX_CLK_IN  
FRAMER192  
Disinterleaver  
FRGEN  
DX_DATA_OUT_[1:4]_[15:0]  
DX_SYNC_OUT[1:4]  
DX_CLK_OUT[1:4]  
TOH EXTRACT  
x4  
TOH INSERT  
LOC  
DET  
Production Release/FINAL Information - The information contained in this doc-  
ument is about a product in its fully tested and characterized stage. All features  
described herein are supported. Contact AMCC for updates to this document and  
the latest product status.  

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