CLC532AJP

更新时间： 2024-02-15 18:01:09

品牌	Logo	应用领域
美国国家半导体 - NSC		复用器开关复用器或开关信号电路光电二极管
页数	文件大小	规格书
12页	280K
描述
High-Speed 2:1 Analog Multiplexer

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中文翻译

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技术参数
数据手册
替代型号

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CLC532AJP 技术参数

生命周期：	Obsolete	包装说明：	DIE,
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.65	模拟集成电路 - 其他类型：	SINGLE-ENDED MULTIPLEXER
JESD-30 代码：	X-XUUC-N14	标称负供电电压 (Vsup)：	-5.2 V
信道数量：	2	功能数量：	1
端子数量：	14	标称断态隔离度：	80 dB
封装主体材料：	UNSPECIFIED	封装代码：	DIE
封装形状：	UNSPECIFIED	封装形式：	UNCASED CHIP
认证状态：	Not Qualified	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	最长断开时间：	7 ns
最长接通时间：	20 ns	技术：	BIPOLAR
端子形式：	NO LEAD	端子位置：	UPPER
Base Number Matches：	1

CLC532AJP 数据手册

mode. The CLC532 output signal can be slew limited by using

its compensation capacitors. This approach also has the

advantage of limiting the excess noise passed through the

CLC532 and on to the ADC. Figure 7 shows the recommended

-1

IN_A

RECTIFIER

INPUT

_COMPvaluesasafunctionofADCSamplerate. Sincetheoptimal

V_OUT

CLC532

values will change from one ADC to the next, this graph should

be used as a starting point for C_COMPselection. Both C_COMP

capacitorsshouldbethesamevaluetomaintainoutputsymmetry.

R_L

IN_B

Flash ADCs are similar to subranging ADCs in that the sampling

period is very brief. The primary difference is that the acquisition

time of a flash converter is much shorter than that of a subranging

ADC. With a flash ADC, the transition of the CLC532 output

should be after the sampling instant ("Aperture Delay" after the

CONVERT command). It is only during this period that a flash

converter is susceptible to interference from a rapidly changing

analog input signal.

10114

+20

50Ω

V_BB

50Ω

0.1µF

Zero Crossing

Treshold

Detector

-2V

Gain Selection for an ADC

Figure 9: Low Distortion Full Wave Rectifier

In many applications, such as RADAR, the dynamic range

requirements may exceed the accuracy requirements. Since

wide dynamic range ADCs are also typically highly accurate

ADCs, this often leads the designer into selecting an ADC which

is a technical overkill and a budget buster. By using the CLC532

as a selectable-gain stage, a less expensive ADC can be used.

As an example, if an application calls for 80dB of dynamic Range

and 0.05% accuracy, rather than using a 14-bit converter, a 12-

bit converter combined with the circuit in figure 8 will meet the

same objective. The CLC532 is used to select between the

analog input signal and a version of the input signal attenuated

Use of the CLC532 as a Mixer.

A double balanced mixer, such as is shown in figure 10, operates

by multiplying the RF input by the LO input. This is done by using

the LO to select one of two paths through a diode bridge

dependingupontheLOsign. TheresultisanoutputwhereIF=RF

when LO>0 and IF=-RF if LO<0. This same result can be

obtained with the circuit shown in figure 11. The CLC532 based

circuit uses a digital LO making system design easier in those

cases where the LO is digitally derived. One advantage of the

CLC532 based approach is excellent isolation between all three

ports. Also see the RF design awards article by Thomas Hack

in the January 1993 issue of RF Design.

by 12dB.

This circuit affords 14-bit dynamic range, 12-bit

accuracy and 12-bit ease of implementation.

+5V

+6.8µF

INPUT

0.1

To 0Ω

Input

Source

50Ω

10pF

IN_A

To 50Ω

Load

11 48.7

Ω

200 Ω R6

CLC532

OUTPUT

R_OUT

Figure 10: Typical Double-Balanced Mixer

D_REF

IN_B

66.6 Ω R _INB

10pF

To 50Ω

Source

DGND

MINI-CIRCUITS

+6.8µF

0.1µF

T4-1T

Gain

SELECT

IN_A

RF INPUT

50Ω

IF OUTPUT

200Ω

CLC532

-5.2V

R_L

IN_B

Figure 8: Selectable Gain Stage Improves

ADC Dynamic Range

DIGITAL

LO INPUT

Full Wave Rectifier Circuit

Figure 11: High-Isolation Mixer Implementation

The use of a diode rectifier provides significant distortion for

signals that are small compared to the forward bias voltage.

Accordingly,whenlowdistortionperformanceisneeded,standard

diode based circuits do not work well. The CLC532 can be

configured to provide a very low distortion full wave rectifier. The

circuit in figure 9 is used to select between an analog input signal

and an inverted version of the input signal. The resulting output

exhibits very little distortion for small scale signals up to several

hundred kilohertz.

Evaluation Board

An evaluation board (part number CLC730028) for the CLC532

is available. This board can be used for fast, trouble-free,

evaluation and characterization of the CLC532. Additionally,

this board serves as a template for layout and fabrication

information. TheCLC532evaluationboarddatasheetisavailable.

http://www.national.com

1...5 6 789 10 11 12

中文翻译

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CLC532AJP 替代型号

型号	品牌	替代类型	描述	数据表
CLC532A8B	NSC	功能相似	High-Speed 2:1 Analog Multiplexer

与CLC532AJP相关器件

型号	品牌	获取价格	描述	数据表
CLC532ALC	NSC	获取价格	High-Speed 2:1 Analog Multiplexer
CLC532AMC	NSC	获取价格	High-Speed 2:1 Analog Multiplexer
CLC532AMC	TI	获取价格	2-CHANNEL, SGL ENDED MULTIPLEXER, UUC14, DIE
CLC533	NSC	获取价格	High-Speed 4:1 Analog Multiplexer
CLC533A8B	NSC	获取价格	High-Speed 4:1 Analog Multiplexer
CLC533A8L-2A	NSC	获取价格	High-Speed 4:1 Analog Multiplexer
CLC533A8L-2AX	TI	获取价格	4-CHANNEL, SGL ENDED MULTIPLEXER, CQCC20, CERAMIC, LCC-20
CLC533AIB	ETC	获取价格	4-Channel Analog Multiplexer
CLC533AJE	NSC	获取价格	High-Speed 4:1 Analog Multiplexer
CLC533AJE-TR13	TI	获取价格	4-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16, 0.150 INCH, PLASTIC, SOIC-16

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