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CLC5523I PDF预览

CLC5523I

更新时间: 2024-02-29 07:58:23
品牌 Logo 应用领域
美国国家半导体 - NSC 放大器
页数 文件大小 规格书
12页 157K
描述
Low-Power, Variable Gain Amplifier

CLC5523I 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:DIP
包装说明:DIP,针数:8
Reach Compliance Code:unknown风险等级:5.65
模拟集成电路 - 其他类型:ANALOG CIRCUITJESD-30 代码:R-PDIP-T8
JESD-609代码:e0长度:9.817 mm
湿度敏感等级:NOT SPECIFIED标称负供电电压 (Vsup):-5 V
功能数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED座面最大高度:5.08 mm
标称供电电压 (Vsup):5 V表面贴装:NO
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

CLC5523I 数据手册

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March 2000  
CLC5523  
Low-Power, Variable Gain Amplifier  
General Descriptions  
Features  
The CLC5523 is a low power, wideband, DC-coupled, voltage-  
controlled gain amplifier. It provides a voltage-controlled gain  
block coupled with a current feedback output amplifier. High  
impedance inputs and minimum dependence of bandwidth on  
gain make the CLC5523 easy to use in a wide range of  
applications. This amplifier is suitable as a continuous gain  
control element in a variety of electronic systems which benefit  
from a wide bandwidth of 250MHz and high slew rate of  
1800V/ms, with only 135mW of power dissipation.  
Low power: 135mW  
250MHz, -3dB bandwidth  
Slew rate 1800V/ms  
Gain flatness 0.2dB @ 75MHz  
Rise & fall times 2.0ns  
Low input voltage noise 4nV/ÖHz  
Applications  
Automatic gain control  
Voltage controlled filters  
Input impedances in the megaohm range on both the signal  
and gain control inputs simplify driving the CLC5523 in any  
application. The CLC5523 can be configured to use pin 3 as a  
low impedance input making it an ideal interface for current  
inputs. By using the CLC5523’s inverting configuration in which  
Automatic signal leveling for A/D  
Amplitude modulation  
Variable gain transimpedance  
R
is driven directly, inputs which exceed the device’s input  
G
voltage range may be used.  
Frequency Response with Changes in Vg  
30  
The gain control input (V ), with a 0 to 2V input range, and a  
G
20  
10  
linear-in-dB gain control, simplifies the implementation of AGC  
circuits. The gain control circuit can adjust the gain as fast as  
4dB/ns. Maximum gains from 2 to 100 are accurately and simply  
set by two external resistors while attenuation of up to 80dB from  
this gain can be achieved.  
0
-10  
-20  
-30  
-40  
-50  
The extremely high slew rate of 1800V/ms and wide bandwidth  
provides high speed rise and fall times of 2.0ns, with settling time  
for a 2 volt step of only 22ns to 0.2%. In time domain applications  
where linear phase is important with gain adjust, the internal cur-  
rent mode circuitry maintains low deviation of delay over a wide  
gain adjust range.  
1M  
10M  
100M  
Frequency (Hz)  
VG  
Pinout  
Typical Application  
DIP & SOIC  
Variable Gain Amplifier  
+5V  
Circuit  
1
2
3
Vin  
8
VG  
VIN  
+VCC  
+
Vo  
RL  
6
CLC5523  
I-  
X1  
7
-
5
Rg  
VO  
-VCC  
Rf  
-
4
+
Rg  
GND  
25W  
-5V  
© 2000 National Semiconductor Corporation  
Printed in the U.S.A.  
http://www.national.com  

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