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CDBD650-G PDF预览

CDBD650-G

更新时间: 2024-11-25 07:19:59
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上华 - COMCHIP /
页数 文件大小 规格书
4页 92K
描述
Chip Schottky Barrier Rectifier

CDBD650-G 数据手册

 浏览型号CDBD650-G的Datasheet PDF文件第2页浏览型号CDBD650-G的Datasheet PDF文件第3页浏览型号CDBD650-G的Datasheet PDF文件第4页 
Chip Schottky Barrier Rectifier  
CDBD620-G Thru. CDBD6100-G  
Reverse Voltage: 20 to 100 Volts  
Forward Current: 6.0 Amp  
RoHS Device  
DPAK  
Features  
-Batch process design, excellent power dissipation offers  
better reverse leakage current and thermal resistance.  
0.264(6.70)  
0.248(6.30)  
-Low profile surface mounted application in order to  
optimize board space.  
0.048(1.20)  
0.031(0.80)  
0.098(2.50)  
0.083(2.10)  
0.217(5.50)  
0.201(5.10)  
-Low power loss, high efficiency.  
0.024(0.60)  
0.016(0.40)  
-High current capability, low forward voltage drop.  
-High surge capability.  
-Guardring for overvoltage protection.  
-Ultra high-speed switching.  
0.244(6.20)  
0.228(5.80)  
-Silicon epitaxial planar chip, metal silicon junction.  
0.024(0.60)  
0.016(0.40)  
0.114(2.90)  
0.098(2.50)  
0.039(1.00)  
0.031(0.80)  
-Lead-free parts meet environmental standards of  
MIL-STD-19500 /228  
0.185(4.70)  
0.169(4.30)  
0.032(0.80)  
0.016(0.40)  
Mechanical data  
-Case: TO-252/DPAK, molded plastic.  
Dimensions in inches and (millimeters)  
-Terminals: solderable per MIL-STD-750,  
method 2026.  
2=4  
-Polarity: Indicated by cathode band.  
-Weunting Position: Any  
-Weight:0.34 gram(approx.).  
1
3
Maximum Ratings (At Ta=25°C, unless otherwise noted)  
CDBD  
CDBD  
CDBD  
650-G  
CDBD  
660-G  
CDBD  
680-G  
CDBD  
Symbol  
VRRM  
VR  
Parameter  
Repetitive peak reverse voltage  
Continuous reverse voltage  
RMS voltage  
Unit  
V
620-G  
640-G  
6100-G  
20  
40  
50  
50  
35  
60  
60  
42  
80  
80  
56  
100  
100  
70  
V
20  
14  
40  
28  
VRMS  
IO  
V
Forward rectified current (See fig. 1)  
6.0  
A
Maximum forward voltage  
IF=6.0A  
VF  
V
A
0.55  
0.75  
0.85  
Forward surge current, 8.3ms single  
half sine-wave superimposed on rated  
load (JEDEC method)  
IFSM  
75  
VR=VRRM TA=25°C  
Reverse current  
IR  
IR  
0.5  
20  
mA  
mA  
VR=VRRM TA=100°C  
Junction to ambient  
Thermal resistance  
RθJA  
80  
°C/W  
3.0  
Junction to case  
RθJC  
TJ  
°C/W  
°C  
Operating temperature  
Storage temperature  
-55 to +125  
-55 to +150  
-65 to +175  
TSTG  
°C  
REV:A  
Page 1  
QW-BB032  
Comchip Technology CO., LTD.  

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