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CD74HCT597 PDF预览

CD74HCT597

更新时间: 2024-11-22 23:04:31
品牌 Logo 应用领域
德州仪器 - TI 移位寄存器存储
页数 文件大小 规格书
10页 51K
描述
High Speed CMOS Logic 8-Bit Shift Register with Input Storage

CD74HCT597 数据手册

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CD74HC597,  
CD74HCT597  
Data sheet acquired from Harris Semiconductor  
SCHS191  
High Speed CMOS Logic  
8-Bit Shift Register with Input Storage  
January 1998  
Features  
Description  
• Buffered Inputs  
The Harris CD74HC597 and CD74HCT597 are high-speed  
silicon gate CMOS devices that are pin-compatible with the  
LSTTL 597 devices. Each device consists of an 8-flip-flop  
input register and an 8-bit parallel-in/serial-in, serial-out shift  
register. Each register is controlled by its own clock. A “low” on  
the parallel load input (PL) shifts parallel stored data asyn-  
chronously into the shift register. A “low” master input (MR)  
• Asynchronous Parallel Load  
[ /Title  
(CD74  
HC597  
,
o
• Typical f  
MAX  
= 60MHz at V = 5V, C = 15pF, T = 25 C  
CC L A  
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
CD74  
HCT59  
7)  
/Sub-  
ject  
(High  
Speed  
CMOS  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads clears the shift register. Serial input data can also be synchro-  
nously shifted through the shift register when PL is high.  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
Ordering Information  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
PKG.  
NO.  
o
PART NUMBER TEMP. RANGE ( C) PACKAGE  
• HC Types  
CD74HC597E  
CD74HCT597E  
CD74HC597M  
CD74HCT597M  
NOTES:  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
16 Ld PDIP  
16 Ld PDIP  
E16.3  
E16.3  
- 2V to 6V Operation  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
CC  
16 Ld SOIC M16.15  
16 Ld SOIC M16.15  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
2. Wafer and die is available which meets all electrical  
specifications. Please contact your local sales office or Harris  
customer service for ordering information.  
Pinout  
CD74HC597, CD74HCT597  
(PDIP, SOIC)  
TOP VIEW  
D1  
D2  
1
2
3
4
5
6
7
8
16 V  
CC  
15 D0  
14 D  
D3  
S
D4  
13 PL  
12 ST  
D5  
CP  
D6  
11 SH  
CP  
10 MR  
Q7  
D7  
9
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 1915.1  
Copyright © Harris Corporation 1998  
1

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