5秒后页面跳转
捷配首页

Datasheet > CD74HCT564M96
CD74HCT564M96 PDF预览

CD74HCT564M96

更新时间： 2024-02-26 03:50:21
品牌 Logo 应用领域
其他 - ETC 触发器逻辑集成电路光电二极管驱动
页数 文件大小 规格书
9页 57K
描述
FLIP-FLOP|OCTAL|D TYPE|HCT-CMOS|SOP|20PIN|PLASTIC

阅读下载

中文翻译

获取价格

CD74HCT564M96 技术参数

生命周期：Obsolete零件包装代码：SOIC
包装说明：SOIC-20针数：20
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.17Is Samacsys：N
其他特性：BROADSIDE VERSION OF 534系列：HCT
JESD-30 代码：R-PDSO-G20长度：12.8 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
最大频率@ Nom-Sup：16000000 Hz最大I（ol）：0.006 A
位数：8功能数量：1
端口数量：2端子数量：20
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：INVERTED
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP20,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE包装方法：TAPE AND REEL
电源：5 V传播延迟（tpd）：53 ns
认证状态：Not Qualified座面最大高度：2.65 mm
子类别：FF/Latches最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
触发器类型：POSITIVE EDGE宽度：7.5 mm
Base Number Matches：1

CD74HCT564M96 数据手册

 浏览型号CD74HCT564M96的Datasheet PDF文件第2页浏览型号CD74HCT564M96的Datasheet PDF文件第3页浏览型号CD74HCT564M96的Datasheet PDF文件第4页浏览型号CD74HCT564M96的Datasheet PDF文件第5页浏览型号CD74HCT564M96的Datasheet PDF文件第6页浏览型号CD74HCT564M96的Datasheet PDF文件第7页 
CD54/74HC534, CD54/74HCT534,  
CD54/74HC564, CD54/74HCT564  
Data sheet acquired from Harris Semiconductor  
SCHS188A  
High Speed CMOS Logic Octal D-Type Flip-Flop,  
Three-State Inverting Positive-Edge Triggered  
January 1998 - Revised May 2000  
Features  
Description  
• Buffered Inputs  
The ’HC534, ’HCT534, ’HC564, and ’HCT564 are high speed  
Octal D-Type Flip-Flops manufactured with silicon gate CMOS  
• Common Three-State Output-Enable Control  
• Three-State Outputs  
[ /Title  
(CD74  
HC534  
,
technology. They possess the low power consumption of stan-  
dard CMOS integrated circuits, as well as the ability to drive  
15 LSTTL loads. Due to the large output drive capability and  
the three-state feature, these devices are ideally suited for  
interfacing with bus lines in a bus organized system. The two  
types are functionally identical and differ only in their pinout  
arrangements.  
• Bus Line Driving Capability  
• Typical Propagation Delay = 13ns at V  
CC  
= 5V,  
CD74  
HCT53  
4,  
CD74  
HC564  
,
o
C = 15pF, T = 25 C (Clock to Output)  
L
A
• Fanout (Over Temperature Range)  
The ’HC534, ’HCT534, ’HC564, and ’HCT564 are positive  
edge triggered flip-flops. Data at the D inputs, meeting the  
setup and hold time requirements, are inverted and trans-  
ferred to the Q outputs on the positive going transition of the  
CLOCK input. When a high logic level is applied to the OUT-  
PUT ENABLE input, all outputs go to a high impedance state,  
regardless of what signals are present at the other inputs and  
the state of the storage elements.  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
CD74  
HCT56  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
The HCT logic family is speed, function, and pin compatible  
with the standard LS logic family.  
• HC Types  
- 2V to 6V Operation  
Ordering Information  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
TEMP. RANGE  
o
CC  
PART NUMBER  
CD54HC534F3A  
CD74HC534E  
( C)  
PACKAGE  
20 Ld CERDIP  
20 Ld PDIP  
• HCT Types  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
CD54HCT534F3A  
CD74HCT534E  
CD54HC564F3A  
CD74HC564E  
20 Ld CERDIP  
20 Ld PDIP  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I ≤ 1µA at V , V  
OL OH  
l
20 Ld CERDIP  
20 Ld PDIP  
CD74HC564M  
CD54HCT564F3A  
CD74HCT564E  
CD74HCT564M  
NOTES:  
20 Ld SOIC  
20 Ld CERDIP  
20 Ld PDIP  
20 Ld SOIC  
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
2. Wafer and die for this part number is available which meets all  
electrical specifications. Please contact your local TI sales office  
or customer service for ordering information.  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2000, Texas Instruments Incorporated  
1
1234567...9

中文翻译

下载PDF

与CD74HCT564M96相关器件

型号 品牌 获取价格 描述 数据表
CD74HCT564ME4 TI

获取价格

 		High-Speed CMOS Logic Octal D-Type Flip-Flop, Three-State Inverting Positive-Edge Triggere
CD74HCT564MG4 TI

获取价格

 		High-Speed CMOS Logic Octal D-Type Flip-Flop, Three-State Inverting Positive-Edge Triggere
CD74HCT573 HARRIS

获取价格

 		High Speed CMOS Logic Octal Transparent Latch, Three-State Output
CD74HCT573 TI

获取价格

 		High Speed CMOS Logic Octal Transparent Latch, Three-State Output
CD74HCT573DBR TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3 STATE OUTPUTS
CD74HCT573DBRE4 TI

获取价格

 		High Speed CMOS Logic Octal Transparent Latches with 3-State Outputs 20-SSOP -55 to 125
CD74HCT573DBRG4 TI

获取价格

 		HCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SSOP-20
CD74HCT573E TI

获取价格

 		High Speed CMOS Logic Octal Transparent Latch, Three-State Output
CD74HCT573E HARRIS

获取价格

 		High Speed CMOS Logic Octal Transparent Latch, Three-State Output
CD74HCT573EN ETC

获取价格

 		Logic IC

与CD74HCT564M96相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证