5秒后页面跳转
CD74HCT573E PDF预览

CD74HCT573E

更新时间: 2024-11-22 23:04:31
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
9页 56K
描述
High Speed CMOS Logic Octal Transparent Latch, Three-State Output

CD74HCT573E 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:DIP
包装说明:DIP-20针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:0.76Samacsys Confidence:
Samacsys Status:ReleasedSamacsys PartID:181267
Samacsys Pin Count:20Samacsys Part Category:Integrated Circuit
Samacsys Package Category:OtherSamacsys Footprint Name:DIP254P762X508-20
Samacsys Released Date:2017-01-12 12:59:53Is Samacsys:N
其他特性:BROADSIDE VERSION OF 373控制类型:ENABLE LOW/HIGH
计数方向:UNIDIRECTIONAL系列:HCT
JESD-30 代码:R-PDIP-T20JESD-609代码:e4
长度:25.4 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.006 A
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP20,.3封装形状:RECTANGULAR
封装形式:IN-LINE包装方法:TUBE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):0.08 mAProp。Delay @ Nom-Sup:53 ns
传播延迟(tpd):53 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:7.62 mmBase Number Matches:1

CD74HCT573E 数据手册

 浏览型号CD74HCT573E的Datasheet PDF文件第2页浏览型号CD74HCT573E的Datasheet PDF文件第3页浏览型号CD74HCT573E的Datasheet PDF文件第4页浏览型号CD74HCT573E的Datasheet PDF文件第5页浏览型号CD74HCT573E的Datasheet PDF文件第6页浏览型号CD74HCT573E的Datasheet PDF文件第7页 
CD74HC373, CD74HCT373,  
CD54HC573, CD74HC573,  
Data sheet acquired from Harris Semiconductor  
SCHS182  
CD74HCT573  
High Speed CMOS Logic  
Octal Transparent Latch, Three-State Output  
November 1997  
Features  
Description  
• Common Latch Enable Control  
• Common Three-State Output Enable Control  
• Buffered Inputs  
The Harris CD74HC373, CD74HCT373, CD54HC573,  
CD74HC573, and CD74HCT573 are high speed Octal Trans-  
parent Latches manufactured with silicon gate CMOS technol-  
ogy. They possess the low power consumption of standard  
CMOS integrated circuits, as well as the ability to drive 15  
LSTTL devices. The CD74HCT373 and CD74HCT573 are  
functionally as well as pin compatible with the standard  
74LS373 and 74LS573.  
[ /Title  
(CD74  
HC373  
,
CD74  
HCT37  
3,  
CD54  
HC573  
,
CD74  
HC573  
,
• Three-State Outputs  
• Bus Line Driving Capacity  
• Typical Propagation Delay = 12ns at V  
= 5V,  
C = 15pF, T = 25 C (Data to Output for HC373)  
CC  
o
The outputs are transparent to the inputs when the latch  
enable (LE) is high. When the latch enable (LE) goes low the  
data is latched. The output enable (OE) controls the three-  
state outputs. When the output enable (OE) is high the  
outputs are in the high impedance state. The latch operation  
is independent to the state of the output enable. The 373 and  
573 are identical in function and differ only in their pinout  
arrangements.  
L
A
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
Ordering Information  
CD74  
HCT57  
3)  
TEMP. RANGE  
PKG.  
NO.  
• HC Types  
- 2V to 6V Operation  
o
PART NUMBER  
CD54HC573F  
CD74HC373E  
CD74HCT373E  
CD74HC573E  
CD74HCT573E  
CD74HC373M  
CD74HCT373M  
CD74HC573M  
CD74HCT573M  
NOTES:  
( C)  
PACKAGE  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
20 Ld CERDIP F20.3  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
/Sub-  
at V  
= 5V  
CC  
20 Ld PDIP  
20 Ld PDIP  
20 Ld PDIP  
20 Ld PDIP  
20 Ld SOIC  
20 Ld SOIC  
20 Ld SOIC  
20 Ld SOIC  
F20.3  
E20.3  
E20.3  
E20.3  
M20.3  
M20.3  
M20.3  
M20.3  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
2. Wafer or die for this part number are available which meets all  
electrical specifications. Please contact your local sales office or  
Harris customer service for ordering information.  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 1679.1  
Copyright © Harris Corporation 1997  
1

CD74HCT573E 替代型号

型号 品牌 替代类型 描述 数据表
5962-8685601RA TI

完全替代

OCTAL TRANSPARENT D-TYPE LATCHES
CD74HCT573M TI

完全替代

High Speed CMOS Logic Octal Transparent Latch, Three-State Output
CD54HCT573F3A TI

完全替代

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3 STATE OUTPUTS

与CD74HCT573E相关器件

型号 品牌 获取价格 描述 数据表
CD74HCT573EN ETC

获取价格

Logic IC
CD74HCT573EX RENESAS

获取价格

暂无描述
CD74HCT573EX ROCHESTER

获取价格

HCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20, PACKAGE-20
CD74HCT573F ETC

获取价格

Logic IC
CD74HCT573H ETC

获取价格

8-Bit D-Type Latch
CD74HCT573M HARRIS

获取价格

High Speed CMOS Logic Octal Transparent Latch, Three-State Output
CD74HCT573M TI

获取价格

High Speed CMOS Logic Octal Transparent Latch, Three-State Output
CD74HCT573M96 TI

获取价格

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3 STATE OUTPUTS
CD74HCT573M96E4 TI

获取价格

HCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SOIC-20
CD74HCT573M96G4 TI

获取价格

具有三态输出的高速 CMOS 逻辑八路透明锁存器 | DW | 20 | -55 to 1