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CD74HCT04M96E4 PDF预览

CD74HCT04M96E4

更新时间: 2024-11-02 12:34:07
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德州仪器 - TI /
页数 文件大小 规格书
17页 890K
描述
High-Speed CMOS Logic Hex Inverter

CD74HCT04M96E4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP14,.25针数:14
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.12
系列:HCTJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:8.65 mm
负载电容(CL):50 pF逻辑集成电路类型:INVERTER
最大I(ol):0.004 A湿度敏感等级:1
功能数量:6输入次数:1
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 VProp。Delay @ Nom-Sup:29 ns
传播延迟(tpd):29 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.75 mm
子类别:Gate最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

CD74HCT04M96E4 数据手册

 浏览型号CD74HCT04M96E4的Datasheet PDF文件第2页浏览型号CD74HCT04M96E4的Datasheet PDF文件第3页浏览型号CD74HCT04M96E4的Datasheet PDF文件第4页浏览型号CD74HCT04M96E4的Datasheet PDF文件第5页浏览型号CD74HCT04M96E4的Datasheet PDF文件第6页浏览型号CD74HCT04M96E4的Datasheet PDF文件第7页 
CD54HC04, CD74HC04,  
CD54HCT04, CD74HCT04  
Data sheet acquired from Harris Semiconductor  
SCHS117E  
High-Speed CMOS Logic Hex Inverter  
August 1997 - Revised June 2004  
Features  
Description  
• Buffered Inputs  
The  
CD54HC04,  
CD54HCT04,  
CD74HC04  
and  
CD74HCT04 logic gates utilize silicon-gate CMOS  
technology to achieve operating speeds similar to LSTTL  
gates, with the low power consumption of standard CMOS  
integrated circuits. All devices have the ability to drive 10  
LSTTL loads. The 74HCT logic family functionally is pin  
compatible with the standard 74LS logic family.  
• Typical Propagation Delay: 6ns at V  
o
= 5V,  
[ /Title  
(CD54H  
C04,  
CD54H  
CT04,  
CD74H  
C04,  
CD74H  
CT04)  
/Subject  
(High  
CC  
C = 15pF, T = 25 C  
L
A
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
Ordering Information  
TEMP. RANGE  
o
PART NUMBER  
CD54HC04F3A  
CD54HCT04F3A  
CD74HC04E  
( C)  
PACKAGE  
14 Ld CERDIP  
14 Ld CERDIP  
14 Ld PDIP  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
• HC Types  
- 2-V to 6-V Operation  
Speed  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
CC  
CD74HC04M  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
14 Ld PDIP  
• HCT Types  
CD74HC04MT  
CD74HC04M96  
CD74HCT04E  
- 4.5-V to 5.5-V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
CD74HCT04M  
CD74HCT04MT  
CD74HCT04M96  
CD74HCT04PWR  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
14 Ld TSSOP  
NOTE: When ordering, use the entire part number. The suffixes  
96 and R denote tape and reel. The suffix T denotes a  
small-quantity reel of 250.  
Pinout  
CD54HC04, CD54HCT04 (CERDIP)  
CD74HC04 (PDIP, SOIC)  
CD74HCT04 (PDIP, SOIC, TSSOP)  
TOP VIEW  
1A  
1Y  
1
2
3
4
5
6
7
14 V  
CC  
13 6A  
12 6Y  
11 5A  
10 5Y  
2A  
2Y  
3A  
3Y  
9
8
4A  
4Y  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2004, Texas Instruments Incorporated  
1

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