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CD74HC597ME4 PDF预览

CD74HC597ME4

更新时间: 2024-11-18 05:09:07
品牌 Logo 应用领域
德州仪器 - TI 移位寄存器存储
页数 文件大小 规格书
18页 488K
描述
High-Speed CMOS Logic 8-Bit Shift Register with Input Storage

CD74HC597ME4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.3其他特性:SISO OPERATION ALSO AVAILABLE
计数方向:RIGHT系列:HC/UH
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:9.9 mm逻辑集成电路类型:PARALLEL IN SERIAL OUT
最大频率@ Nom-Sup:20000000 Hz湿度敏感等级:1
位数:8功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:2/6 V传播延迟(tpd):265 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Shift Registers最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:3.9 mm
最小 fmax:23 MHz

CD74HC597ME4 数据手册

 浏览型号CD74HC597ME4的Datasheet PDF文件第2页浏览型号CD74HC597ME4的Datasheet PDF文件第3页浏览型号CD74HC597ME4的Datasheet PDF文件第4页浏览型号CD74HC597ME4的Datasheet PDF文件第5页浏览型号CD74HC597ME4的Datasheet PDF文件第6页浏览型号CD74HC597ME4的Datasheet PDF文件第7页 
CD54HC597, CD74HC597,  
CD74HCT597  
Data sheet acquired from Harris Semiconductor  
SCHS191C  
High-Speed CMOS Logic  
8-Bit Shift Register with Input Storage  
January 1998 - Revised October 2003  
Features  
Description  
• Buffered Inputs  
The ’HC597 and CD74HCT597 are high-speed silicon gate  
CMOS devices that are pin-compatible with the LSTTL 597  
devices. Each device consists of an 8-flip-flop input register  
and an 8-bit parallel-in/serial-in, serial-out shift register. Each  
register is controlled by its own clock. A “low” on the parallel  
load input (PL) shifts parallel stored data asynchronously into  
the shift register. A “low” master input (MR) clears the shift  
• Asynchronous Parallel Load  
[ /Title  
(CD74  
HC597  
,
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
CD74  
HCT59  
7)  
/Sub-  
ject  
(High  
Speed  
CMOS  
• Wide Operating Temperature Range . . . -55 C to 125 C register. Serial input data can also be synchronously shifted  
through the shift register when PL is high.  
• Balanced Propagation Delay and Transition Times  
Ordering Information  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
o
PART NUMBER  
CD54HC597F3A  
CD74HC597E  
TEMP. RANGE ( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
• HC Types  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
- 2V to 6V Operation  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
CC  
CD74HC597M  
• HCT Types  
CD74HC597MT  
CD74HC597M96  
CD74HC597NSR  
CD74HCT597E  
CD74HCT597M  
CD74HCT597MT  
CD74HCT597M96  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
NOTE: When ordering, use the entire part number. The suffixes 96  
and R denote tape and reel. The suffix T denotes a small-quantity  
reel of 250.  
Pinout  
CD54HC597  
(CERDIP)  
CD74HC597  
(PDIP, SOIC, SOP)  
CD74HCT597  
(PDIP, SOIC)  
TOP VIEW  
D1  
D2  
1
2
3
4
5
6
7
8
16 V  
CC  
15 D0  
14 D  
D3  
S
D4  
13 PL  
12 ST  
D5  
CP  
D6  
11 SH  
CP  
10 MR  
Q7  
D7  
9
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1

CD74HC597ME4 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC597MTG4 TI

完全替代

High-Speed CMOS Logic 8-Bit Shift Register with Input Storage
CD74HC597MTE4 TI

完全替代

High-Speed CMOS Logic 8-Bit Shift Register with Input Storage
CD74HC597M96 TI

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High-Speed CMOS Logic 8-Bit Shift Register with Input Storage

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