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CD74HC597M96 PDF预览

CD74HC597M96

更新时间: 2024-11-17 22:23:03
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页数 文件大小 规格书
14页 330K
描述
High-Speed CMOS Logic 8-Bit Shift Register with Input Storage

CD74HC597M96 数据手册

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CD54HC597, CD74HC597,  
CD74HCT597  
Data sheet acquired from Harris Semiconductor  
SCHS191C  
High-Speed CMOS Logic  
8-Bit Shift Register with Input Storage  
January 1998 - Revised October 2003  
Features  
Description  
• Buffered Inputs  
The ’HC597 and CD74HCT597 are high-speed silicon gate  
CMOS devices that are pin-compatible with the LSTTL 597  
devices. Each device consists of an 8-flip-flop input register  
and an 8-bit parallel-in/serial-in, serial-out shift register. Each  
register is controlled by its own clock. A “low” on the parallel  
load input (PL) shifts parallel stored data asynchronously into  
the shift register. A “low” master input (MR) clears the shift  
• Asynchronous Parallel Load  
[ /Title  
(CD74  
HC597  
,
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
CD74  
HCT59  
7)  
/Sub-  
ject  
(High  
Speed  
CMOS  
• Wide Operating Temperature Range . . . -55 C to 125 C register. Serial input data can also be synchronously shifted  
through the shift register when PL is high.  
• Balanced Propagation Delay and Transition Times  
Ordering Information  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
o
PART NUMBER  
CD54HC597F3A  
CD74HC597E  
TEMP. RANGE ( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
• HC Types  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
- 2V to 6V Operation  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
CC  
CD74HC597M  
• HCT Types  
CD74HC597MT  
CD74HC597M96  
CD74HC597NSR  
CD74HCT597E  
CD74HCT597M  
CD74HCT597MT  
CD74HCT597M96  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
NOTE: When ordering, use the entire part number. The suffixes 96  
and R denote tape and reel. The suffix T denotes a small-quantity  
reel of 250.  
Pinout  
CD54HC597  
(CERDIP)  
CD74HC597  
(PDIP, SOIC, SOP)  
CD74HCT597  
(PDIP, SOIC)  
TOP VIEW  
D1  
D2  
1
2
3
4
5
6
7
8
16 V  
CC  
15 D0  
14 D  
D3  
S
D4  
13 PL  
12 ST  
D5  
CP  
D6  
11 SH  
CP  
10 MR  
Q7  
D7  
9
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1

CD74HC597M96 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC597M96G4 TI

完全替代

High-Speed CMOS Logic 8-Bit Shift Register with Input Storage
CD74HC597MT TI

完全替代

High-Speed CMOS Logic 8-Bit Shift Register with Input Storage
CD74HC597M TI

完全替代

High Speed CMOS Logic 8-Bit Shift Register with Input Storage

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CD74HC597NSRE4 TI

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