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CD74HC4538PWRG4 PDF预览

CD74HC4538PWRG4

更新时间: 2024-11-23 23:04:27
品牌 Logo 应用领域
德州仪器 - TI 振荡器预分频器多谐振动器逻辑集成电路光电二极管时钟
页数 文件大小 规格书
18页 380K
描述
High-Speed CMOS Logic Dual Retriggerable Precision Monostable Multivibrator

CD74HC4538PWRG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP16,.25针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:6 weeks风险等级:5
Is Samacsys:N系列:HC/UH
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:MONOSTABLE MULTIVIBRATOR最大I(ol):0.0052 A
湿度敏感等级:1位数:2
数据/时钟输入次数:2功能数量:2
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):260电源:2/6 V
最大电源电流(ICC):0.08 mA传播延迟(tpd):375 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Prescaler/Multivibrators最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

CD74HC4538PWRG4 数据手册

 浏览型号CD74HC4538PWRG4的Datasheet PDF文件第2页浏览型号CD74HC4538PWRG4的Datasheet PDF文件第3页浏览型号CD74HC4538PWRG4的Datasheet PDF文件第4页浏览型号CD74HC4538PWRG4的Datasheet PDF文件第5页浏览型号CD74HC4538PWRG4的Datasheet PDF文件第6页浏览型号CD74HC4538PWRG4的Datasheet PDF文件第7页 
CD54HC4538, CD74HC4538,  
CD54HCT4538, CD74HCT4538  
Data sheet acquired from Harris Semiconductor  
SCHS123E  
High-Speed CMOS Logic Dual Retriggerable  
Precision Monostable Multivibrator  
June 1998 - Revised October 2003  
Features  
Description  
• Retriggerable/Resettable Capability  
The  
’HC4538  
and  
’HCT4538  
are  
dual  
retriggerable/resettable monostable precision multivibrators  
for fixed voltage timing applications. An external resistor  
• Trigger and Reset Propagation Delays Independent of  
[ /Title  
(CD54  
HC453  
8,  
CD74  
HC453  
8,  
CD74  
HCT45  
38)  
/Sub-  
ject  
R , C  
X
X
(R ) and an external capacitor (C ) control the timing and  
X
X
the accuracy for the circuit. Adjustment of R and C  
• Triggering from the Leading or Trailing Edge  
• Q and Q Buffered Outputs Available  
• Separate Resets  
X
X
provides a wide range of output pulse widths from the Q and  
Q terminals. The propagation delay from trigger input-to-  
output transition and the propagation delay from reset input-  
to-output transition are independent of R and C .  
X
X
• Wide Range of Output Pulse Widths  
• Schmitt Trigger Input on A and B Inputs  
Leading-edge triggering (A) and trailing edge triggering (B)  
inputs are provided for triggering from either edge of the  
input pulse. An unused “A” input should be tied to GND and  
• Retrigger Time is Independent of C  
X
an unused B should be tied to V . On power up the IC is  
CC  
• Fanout (Over Temperature Range)  
reset. Unused resets and sections must be terminated. In  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads normal operation the circuit retriggers on the application of  
each new trigger pulse. To operate in the non-triggerable  
mode Q is connected to B when leading edge triggering (A)  
is used or Q is connected to A when trailing edge triggering  
(B) is used. The period (τ) can be calculated from τ = (0.7)  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
(High  
Speed  
CMOS  
Logic  
R , C ; R  
is 5k. C is 0pF.  
X
X
MIN  
MIN  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
Ordering Information  
• HC Types  
TEMP. RANGE  
- 2V to 6V Operation  
o
PART NUMBER  
CD54HC4538F3A  
CD54HCT4538F3A  
CD74HC4538E  
( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld CERDIP  
16 Ld PDIP  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
at V  
= 5V  
CC  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
CD74HC4538M  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOP  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
l
OL OH  
CD74HC4538MT  
CD74HC4538M96  
CD74HC4538NSR  
CD74HC4538PW  
CD74HC4538PWR  
CD74HC4538PWT  
CD74HCT4538E  
CD74HCT4538M  
CD74HCT4538MT  
CD74HCT4538M96  
Pinout  
CD54HC4538, CD54HCT4538  
(CERDIP)  
CD74HC4538  
(PDIP, SOIC, SOP, TSSOP)  
CD74HCT4538  
16 Ld TSSOP  
16 Ld TSSOP  
16 Ld TSSOP  
16 Ld PDIP  
(PDIP, SOIC)  
TOP VIEW  
1C  
1
2
3
4
5
6
7
8
16  
V
X
CC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
1R C  
15 2C  
X
X
X
1R  
1A  
14 2R C  
X
X
13 2R  
12 2A  
11 2B  
10 2Q  
1B  
NOTE: When ordering, use the entire part number. The suffixes 96  
and R denote tape and reel. The suffix T denotes a small-quantity  
reel of 250.  
1Q  
1Q  
9
2Q  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1

CD74HC4538PWRG4 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC4538M TI

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High Speed CMOS Logic Dual Retriggerable Precision Monostable Multivibrator
CD74HC4538E TI

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CD74HC123E TI

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High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Resets

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