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CD74HC534

更新时间： 2024-11-01 23:00:39
品牌 Logo 应用领域
德州仪器 - TI 触发器
页数 文件大小 规格书
9页 55K
描述
High Speed CMOS Logic Octal D-Type Flip-Flop, Three-State Inverting Positive-Edge Triggered

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CD74HC534 数据手册

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CD74HC534, CD74HCT534,  
CD74HC564, CD74HCT564  
Data sheet acquired from Harris Semiconductor  
SCHS188  
High Speed CMOS Logic Octal D-Type Flip-Flop,  
Three-State Inverting Positive-Edge Triggered  
January 1998  
Features  
Description  
• Buffered Inputs  
The Harris CD74HC534, CD74HCT534, CD74HC564 and  
CD74HCT564 are high speed Octal D-Type Flip-Flops manu-  
• Common Three-State Output-Enable Control  
• Three-State Outputs  
[ /Title  
(CD74  
HC534  
,
factured with silicon gate CMOS technology. They possess  
the low power consumption of standard CMOS integrated cir-  
cuits, as well as the ability to drive 15 LSTTL loads. Due to the  
large output drive capability and the three-state feature, these  
devices are ideally suited for interfacing with bus lines in a bus  
organized system. The two types are functionally identical and  
differ only in their pinout arrangements.  
• Bus Line Driving Capability  
• Typical Propagation Delay = 13ns at V  
CC  
= 5V,  
CD74  
HCT53  
4,  
CD74  
HC564  
,
o
C = 15pF, T = 25 C (Clock to Output)  
L
A
• Fanout (Over Temperature Range)  
The CD74HC534, CD74HCT534, CD74HC564 and  
CD74HCT564 are positive edge triggered flip-flops. Data at  
the D inputs, meeting the setup and hold time requirements,  
are inverted and transferred to the Q outputs on the positive  
going transition of the CLOCK input. When a high logic level is  
applied to the OUTPUT ENABLE input, all outputs go to a  
high impedance state, regardless of what signals are present  
at the other inputs and the state of the storage elements.  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
CD74  
HCT56  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
The CD74HCT logic family is speed, function, and pin  
compatible with the standard 74LS logic family.  
• HC Types  
- 2V to 6V Operation  
Ordering Information  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
PKG.  
CC  
o
PART NUMBER TEMP. RANGE ( C) PACKAGE  
NO.  
E20.3  
E20.3  
E20.3  
E20.3  
• HCT Types  
CD74HC534E  
CD74HCT534E  
CD74HC564E  
CD74HCT564E  
CD74HC564M  
CD74HCT564M  
NOTES:  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
20 Ld PDIP  
20 Ld PDIP  
20 Ld PDIP  
20 Ld PDIP  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I ≤ 1µA at V , V  
l
OL OH  
20 Ld SOIC M20.3  
20 Ld SOIC M20.3  
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
2. Wafer and die for this part number is available which meets all  
electrical specifications. Please contact your local sales office or  
Harris customer service for ordering information.  
Pinouts  
CD74HC534, CD74HCT534 (PDIP)  
CD74HC564, CD74HCT564 (PDIP, SOIC)  
TOP VIEW  
TOP VIEW  
1
2
3
4
5
6
7
8
9
V
1
2
3
4
5
6
7
8
9
V
OE  
Q0  
D0  
D1  
Q1  
Q2  
D2  
D3  
Q3  
20  
19  
OE  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
20  
19  
CC  
CC  
Q7  
Q0  
18 D7  
17 D6  
16 Q6  
18 Q1  
17 Q2  
16 Q3  
15  
Q5  
15  
Q4  
14 D5  
13 D4  
14 Q5  
13 Q6  
12  
12  
Q4  
Q7  
GND 10  
11 CP  
GND 10  
11 CP  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 1640.1  
Copyright © Harris Corporation 1998  
1
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CD74HC534 替代型号

型号 品牌 替代类型 描述 数据表
CD54HC534 TI

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 High-Speed CMOS Logic Octal D-Type Flip-Flop, Three-State Inverting Positive-Edge Triggere

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