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CD74HC4050MTE4 PDF预览

CD74HC4050MTE4

更新时间： 2024-11-01 23:07:31
品牌 Logo 应用领域
德州仪器 - TI 逻辑集成电路光电二极管
页数 文件大小 规格书
7页 135K
描述
High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting

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CD74HC4050MTE4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP, SOP16,.25针数：16
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.29其他特性：CMOS-TTL LEVEL TRANSLATOR
系列：HC/UHJESD-30 代码：R-PDSO-G16
JESD-609代码：e4长度：9.9 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUFFER
最大I（ol）：0.004 A湿度敏感等级：1
功能数量：6输入次数：1
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：260
电源：2/6 VProp。Delay @ Nom-Sup：26 ns
传播延迟（tpd）：130 ns认证状态：Not Qualified
施密特触发器：NO座面最大高度：1.75 mm
子类别：Gates最大供电电压 (Vsup)：6 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：4.5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：3.9 mmBase Number Matches：1

CD74HC4050MTE4 数据手册

 浏览型号CD74HC4050MTE4的Datasheet PDF文件第2页浏览型号CD74HC4050MTE4的Datasheet PDF文件第3页浏览型号CD74HC4050MTE4的Datasheet PDF文件第4页浏览型号CD74HC4050MTE4的Datasheet PDF文件第5页浏览型号CD74HC4050MTE4的Datasheet PDF文件第6页浏览型号CD74HC4050MTE4的Datasheet PDF文件第7页 
CD54HC4049, CD74HC4049,  
CD54HC4050, CD74HC4050  
Data sheet acquired from Harris Semiconductor  
SCHS205I  
High-Speed CMOS Logic  
Hex Buffers, Inverting and Non-Inverting  
February 1998 - Revised February 2005  
Features  
Description  
• Typical Propagation Delay: 6ns at V  
o
= 5V,  
CC  
The ’HC4049 and ’HC4050 are fabricated with high-speed  
silicon gate technology. They have a modified input  
protection structure that enables these parts to be usedas  
logic level translators which convert high-level logic to a low-  
level logic while operating off the low-level logic supply. For  
example, 15-V input pulse levels can be down-converted to  
C = 15pF, T = 25 C  
L
A
[ /Title  
(CD74H  
C4049,  
CD74H  
C4050)  
/Sub-  
• High-to-Low Voltage Level Converter for up to V = 16V  
l
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads 0-V to 5-V logic levels. The modified input protection  
structure protects the input from negative electrostatic  
discharge. These parts also can be used as simple buffers  
or inverters without level translation. The ’HC4049 and  
’HC4050 are enhanced versions of equivalent CMOS types.  
o
o
• Wide Operating Temperature Range . . .–55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
ject  
(High  
Speed  
CMOS  
Logic  
Hex  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
Ordering Information  
• HC Types  
TEMP. RANGE  
o
- 2V to 6V Operation  
PART NUMBER  
CD54HC4049F3A  
CD54HC4050F3A  
CD74HC4049E  
( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld CERDIP  
16 Ld PDIP  
- High Noise Immunity: N = 30%, N = 30%of V  
IL IH  
at  
CC  
V
= 5V  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
CC  
Pinout  
CD54HC4049, CD54HC4050  
(CERDIP)  
CD74HC4049, CD74HC4050  
(PDIP, SOIC, SOP, TSSOP)  
TOP VIEW  
CD74HC4049M  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOP  
CD74HCT4050MT  
CD74HC4049M96  
CD74HC4049NSR  
CD74HC4049PW  
CD74HC4049PWR  
CD74HC4049PWT  
CD74HC4050E  
4049 4050  
4050  
16 NC  
4049  
NC  
V
V
1
2
3
4
5
6
7
8
CC  
1Y  
CC  
1Y  
16 Ld TSSOP  
16 Ld TSSOP  
16 Ld TSSOP  
16 Ld PDIP  
15 6Y  
14 6A  
13 NC  
12 5Y  
11 5A  
10 4Y  
6Y  
6A  
NC  
5Y  
5A  
4Y  
4A  
1A  
2Y  
2A  
3Y  
3A  
1A  
2Y  
2A  
3Y  
3A  
CD74HC4050M  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOP  
CD74HC4050MT  
CD74HC4050M96  
CD74HC4050NSR  
CD74HC4050PW  
CD74HC4050PWR  
CD74HC4050PWT  
9
4A  
GND GND  
16 Ld TSSOP  
16 Ld TSSOP  
16 Ld TSSOP  
NOTE: When ordering, use the entire part number. The suffixes 96  
and R denote tape and reel. The suffix T denotes a small-quantity  
reel of 250.  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2005,Texas Instruments Incorporated  
1
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CD74HC4050MTE4 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC4050MT TI

完全替代

 High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting
CD74HC4050M96 TI

完全替代

 High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting
CD74HC4050M TI

完全替代

 High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting

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