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CD74HC4050PWRG4

更新时间： 2024-11-25 22:13:35
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德州仪器 - TI /
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描述
High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting

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CD74HC4050PWRG4 数据手册

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CD54HC4049, CD74HC4049,  
CD54HC4050, CD74HC4050  
Data sheet acquired from Harris Semiconductor  
SCHS205I  
High-Speed CMOS Logic  
Hex Buffers, Inverting and Non-Inverting  
February 1998 - Revised February 2005  
Features  
Description  
• Typical Propagation Delay: 6ns at V  
o
= 5V,  
CC  
The ’HC4049 and ’HC4050 are fabricated with high-speed  
silicon gate technology. They have a modified input  
protection structure that enables these parts to be usedas  
logic level translators which convert high-level logic to a low-  
level logic while operating off the low-level logic supply. For  
example, 15-V input pulse levels can be down-converted to  
C = 15pF, T = 25 C  
L
A
[ /Title  
(CD74H  
C4049,  
CD74H  
C4050)  
/Sub-  
• High-to-Low Voltage Level Converter for up to V = 16V  
l
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads 0-V to 5-V logic levels. The modified input protection  
structure protects the input from negative electrostatic  
discharge. These parts also can be used as simple buffers  
or inverters without level translation. The ’HC4049 and  
’HC4050 are enhanced versions of equivalent CMOS types.  
o
o
• Wide Operating Temperature Range . . .–55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
ject  
(High  
Speed  
CMOS  
Logic  
Hex  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
Ordering Information  
• HC Types  
TEMP. RANGE  
o
- 2V to 6V Operation  
PART NUMBER  
CD54HC4049F3A  
CD54HC4050F3A  
CD74HC4049E  
( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld CERDIP  
16 Ld PDIP  
- High Noise Immunity: N = 30%, N = 30%of V  
IL IH  
at  
CC  
V
= 5V  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
CC  
Pinout  
CD54HC4049, CD54HC4050  
(CERDIP)  
CD74HC4049, CD74HC4050  
(PDIP, SOIC, SOP, TSSOP)  
TOP VIEW  
CD74HC4049M  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOP  
CD74HCT4050MT  
CD74HC4049M96  
CD74HC4049NSR  
CD74HC4049PW  
CD74HC4049PWR  
CD74HC4049PWT  
CD74HC4050E  
4049 4050  
4050  
16 NC  
4049  
NC  
V
V
1
2
3
4
5
6
7
8
CC  
1Y  
CC  
1Y  
16 Ld TSSOP  
16 Ld TSSOP  
16 Ld TSSOP  
16 Ld PDIP  
15 6Y  
14 6A  
13 NC  
12 5Y  
11 5A  
10 4Y  
6Y  
6A  
NC  
5Y  
5A  
4Y  
4A  
1A  
2Y  
2A  
3Y  
3A  
1A  
2Y  
2A  
3Y  
3A  
CD74HC4050M  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOP  
CD74HC4050MT  
CD74HC4050M96  
CD74HC4050NSR  
CD74HC4050PW  
CD74HC4050PWR  
CD74HC4050PWT  
9
4A  
GND GND  
16 Ld TSSOP  
16 Ld TSSOP  
16 Ld TSSOP  
NOTE: When ordering, use the entire part number. The suffixes 96  
and R denote tape and reel. The suffix T denotes a small-quantity  
reel of 250.  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2005,Texas Instruments Incorporated  
1
1234567

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CD74HC4050PWRG4 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC4050PWRE4 TI

完全替代

 High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting
CD74HC4050PWT TI

完全替代

 High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting
CD74HC4050PWG4 TI

完全替代

 High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting

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