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CD74HC138QM96Q1 PDF预览

CD74HC138QM96Q1

更新时间: 2024-11-02 12:42:59
品牌 Logo 应用领域
德州仪器 - TI 解码器解复用器
页数 文件大小 规格书
9页 203K
描述
HIGH-SPEED CMOS LOGIC 3- TO 8-LINE INVERTING DECODER/DEMULTIPLEXER

CD74HC138QM96Q1 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.76系列:HC
输入调节:STANDARDJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:9.9 mm
负载电容(CL):50 pF逻辑集成电路类型:OTHER DECODER/DRIVER
最大I(ol):0.0052 A湿度敏感等级:1
位数:8功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TR
峰值回流温度(摄氏度):260电源:2/6 V
最大电源电流(ICC):0.08 mAProp。Delay @ Nom-Sup:30 ns
传播延迟(tpd):225 ns认证状态:Not Qualified
筛选级别:AEC-Q100座面最大高度:1.75 mm
子类别:Decoder/Drivers最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mm

CD74HC138QM96Q1 数据手册

 浏览型号CD74HC138QM96Q1的Datasheet PDF文件第2页浏览型号CD74HC138QM96Q1的Datasheet PDF文件第3页浏览型号CD74HC138QM96Q1的Datasheet PDF文件第4页浏览型号CD74HC138QM96Q1的Datasheet PDF文件第5页浏览型号CD74HC138QM96Q1的Datasheet PDF文件第6页浏览型号CD74HC138QM96Q1的Datasheet PDF文件第7页 
CD74HC138-Q1  
HIGH-SPEED CMOS LOGIC  
3- TO 8-LINE INVERTING DECODER/DEMULTIPLEXER  
SCLS580A − APRIL 2004 − REVISED APRIL 2008  
D
D
D
D
D
Qualified for Automotive Applications  
D
Significant Power Reduction Compared to  
LSTTL Logic ICs  
Select One of Eight Data Outputs Active  
Low  
D
2-V to 6-V V Operation  
CC  
I/O Port or Memory Selector  
D
High Noise Immunity; N or N = 30% of  
IL  
IH  
V
CC  
, V = 5 V  
CC  
Three Enable Inputs to Simplify Cascading  
Typical Propagation Delay of 13 ns at  
M PACKAGE  
(TOP VIEW)  
V
= 5 V, C = 15 pF, T = 255C  
CC  
L
A
D
Fanout (Over Temperature Range)  
− Standard Outputs . . . 10 LSTTL Loads  
− Bus Driver Outputs . . . 15 LSTTL Loads  
A0  
A1  
A2  
E1  
E2  
E3  
Y7  
GND  
VCC  
Y0  
Y1  
Y2  
Y3  
Y4  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
D
Balanced Propagation Delay and Transition  
Times  
10 Y5  
Y6  
description/ordering information  
9
The CD74HC138 is a high-speed silicon-gate CMOS  
decoder well suited to memory address decoding or  
data routing applications. This circuit features low  
power consumption usually associated with CMOS circuitry, yet has speeds comparable to low-power Schottky  
TTL logic. The circuit has three binary select inputs (A0, A1, and A2). If the device is enabled, these inputs  
determine which one of the eight normally high outputs of the HC138 will go low.  
Two active-low and one active-high enables (E1, E2, and E3) are provided to ease the cascading of decoders.  
The decoder’s eight outputs can drive ten low-power Schottky TTL equivalent loads.  
{
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
−40°C to 125°C  
SOIC − M Reel of 2500  
CD74HC138QM96Q1  
HC138Q  
For the most current package and ordering information, see the Package Option Addendum at the  
end of this document, or see the TI web site at http://www.ti.com.  
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2008, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

CD74HC138QM96Q1 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC138QM96G4Q1 TI

完全替代

HIGH-SPEED CMOS LOGIC 3- TO 8-LINE INVERTING DECODER/DEMULTIPLEXER
SN74HC138DR TI

类似代替

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SN74HC138D TI

类似代替

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

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IC,DECODER/DEMUX,2-TO-4-LINE,HC-CMOS,DIP,16PIN,PLASTIC
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Decoder/Driver, HC/UH Series, Inverted Output, CMOS, PDIP16