生命周期: | Obsolete | 包装说明: | DIE, |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.84 | Is Samacsys: | N |
模拟集成电路 - 其他类型: | PHASE LOCKED LOOP | JESD-30 代码: | X-XUUC-N16 |
功能数量: | 1 | 端子数量: | 16 |
最高工作温度: | 125 °C | 最低工作温度: | -55 °C |
封装主体材料: | UNSPECIFIED | 封装代码: | DIE |
封装形状: | UNSPECIFIED | 封装形式: | UNCASED CHIP |
认证状态: | Not Qualified | 最大供电电压 (Vsup): | 5.5 V |
最小供电电压 (Vsup): | 4.5 V | 标称供电电压 (Vsup): | 5 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | MILITARY | 端子形式: | NO LEAD |
端子位置: | UPPER | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
CD54HCT7046AM | ETC |
获取价格 |
Analog IC | |
CD54HCT73E | ETC |
获取价格 |
Logic IC | |
CD54HCT73EN | ETC |
获取价格 |
Logic IC | |
CD54HCT73F | ROCHESTER |
获取价格 |
HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 | |
CD54HCT73F/3 | RENESAS |
获取价格 |
HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 | |
CD54HCT73F/3A | RENESAS |
获取价格 |
IC HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14, F | |
CD54HCT73F3A | RENESAS |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,HCT-CMOS,DIP,14PIN,CERAMIC | |
CD54HCT73H/3 | RENESAS |
获取价格 |
HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC14 | |
CD54HCT73M | ETC |
获取价格 |
Logic IC | |
CD54HCT74 | TI |
获取价格 |
Dual D Flip-Flop with Set and Reset Positive-Edge Trigger |