CD54HC165, CD74HC165,
CD54HCT165, CD74HCT165
Data sheet acquired from Harris Semiconductor
SCHS156C
High-Speed CMOS Logic
February 1998 - Revised October 2003
8-Bit Parallel-In/Serial-Out Shift Register
Features
Description
• Buffered Inputs
The ’HC165 and ’HCT165 are 8-bit parallel or serial-in shift
registers with complementary serial outputs (Q and Q )
7
7
• Asynchronous Parallel Load
• Complementary Outputs
[ /Title
(CD74H
C165,
CD74H
CT165)
/Subject
(High
available from the last stage. When the parallel load (PL)
input is LOW, parallel data from the D0 to D7 inputs are
loaded into the register asynchronously. When the PL is
HIGH, data enters the register serially at the DS input and
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
shifts one place to the right (Q →Q →Q , etc.) with each
0
1
2
positive-going clock transition. This feature allows parallel-
o
o
to-serial converter expansion by typing the Q output to the
• Wide Operating Temperature Range . . . -55 C to 125 C
• Balanced Propagation Delay and Transition Times
7
DS input of the succeeding device.
For predictable operation the LOW-to-HIGH transition of CE
should only take place while CP is HIGH. Also, CP an d CE
should be LOW before the LOW-to-HIGH transition of PL to
prevent shifting the data when PL goes HIGH.
Speed
• Significant Power Reduction Compared to LSTTL
Logic ICs
CMOS
Logic 8-
Bit Par-
allel-
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N = 30%, N = 30% of V
CC
Ordering Information
IL
IH
at V
= 5V
CC
TEMP. RANGE
o
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
PART NUMBER
CD54HC165F3A
CD54HCT165F3A
CD74HC165E
( C)
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
V = 0.8V (Max), V = 2V (Min)
IL IH
- CMOS Input Compatibility, I ≤ 1µA at V , V
l
OL OH
CD74HC165M
Pinout
CD74HC165MT
CD54HC165M96
CD74HCT165E
CD74HCT165M
CD74HCT165MT
CD54HCT165M96
CD54HC165, CD54HCT165
(CERDIP)
CD74HC165, CD74HCT165
(PDIP, SOIC)
TOP VIEW
PL
CP
D4
D5
D6
D7
1
2
3
4
5
6
7
8
16 V
CC
15 CE
14 D3
13 D2
12 D1
11 D0
10 DS
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
Q
7
9
Q
7
GND
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
1