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CD4528BCM PDF预览

CD4528BCM

更新时间: 2024-11-03 22:54:23
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 振荡器预分频器多谐振动器逻辑集成电路光电二极管时钟
页数 文件大小 规格书
9页 108K
描述
Dual Monostable Multivibrator

CD4528BCM 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.25
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.18
系列:4000/14000/40000JESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:9.9 mm
逻辑集成电路类型:MONOSTABLE MULTIVIBRATOR数据/时钟输入次数:2
功能数量:2端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5/15 V
传播延迟(tpd):500 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Prescaler/Multivibrators
最大供电电压 (Vsup):18 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

CD4528BCM 数据手册

 浏览型号CD4528BCM的Datasheet PDF文件第2页浏览型号CD4528BCM的Datasheet PDF文件第3页浏览型号CD4528BCM的Datasheet PDF文件第4页浏览型号CD4528BCM的Datasheet PDF文件第5页浏览型号CD4528BCM的Datasheet PDF文件第6页浏览型号CD4528BCM的Datasheet PDF文件第7页 
October 1987  
Revised August 2000  
CD4528BC  
Dual Monostable Multivibrator  
General Description  
Features  
The CD4528B is a dual monostable multivibrator. Each  
device is retriggerable and resettable. Triggering can occur  
from either the rising or falling edge of an input pulse,  
resulting in an output pulse over a wide range of widths.  
Pulse duration and accuracy are determined by external  
timing components Rx and Cx.  
Wide supply voltage range: 3.0V to 18V  
Separate reset available  
Quiescent current = 5.0 nA/package (typ.) at 5.0 VDC  
Diode protection on all inputs  
Triggerable from leading or trailing edge pulse  
Capable of driving two low-power TTL loads or one low-  
power Schottky TTL load over the rated temperature  
range  
Ordering Code:  
Order Number Package Number  
Package Description  
CD4528BCM  
CD4528BCN  
M16A  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Truth Table  
Inputs  
Outputs  
Clear  
A
X
H
X
L
B
X
X
L
Q
L
L
L
Q
H
H
H
L
X
X
H
H
H
H = HIGH Level  
L = LOW Level  
↑ = Transition from LOW-to-HIGH  
↓ = Transition from HIGH-to-LOW  
= One HIGH Level Pulse  
= One LOW Level Pulse  
X = Irrelevant  
Top View  
© 2000 Fairchild Semiconductor Corporation  
DS005998  
www.fairchildsemi.com  

CD4528BCM 替代型号

型号 品牌 替代类型 描述 数据表
HEF4528BT NEXPERIA

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