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CD4078BFMSR PDF预览

CD4078BFMSR

更新时间: 2024-10-26 19:29:03
品牌 Logo 应用领域
瑞萨 - RENESAS 输入元件
页数 文件大小 规格书
8页 68K
描述
4000/14000/40000 SERIES, 8-INPUT OR/NOR GATE, CDIP14

CD4078BFMSR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.33
系列:4000/14000/40000JESD-30 代码:R-GDIP-T14
JESD-609代码:e0长度:9.585 mm
负载电容(CL):50 pF逻辑集成电路类型:OR/NOR GATE
最大频率@ Nom-Sup:3000000 Hz最大I(ol):0.00036 A
功能数量:1输入次数:8
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5/15 V
Prop。Delay @ Nom-Sup:405 ns传播延迟(tpd):405 ns
认证状态:Not Qualified施密特触发器:NO
筛选级别:MIL-PRF-38535 Class V座面最大高度:5.33 mm
子类别:Gates标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
总剂量:100k Rad(Si) V宽度:7.62 mm
Base Number Matches:1

CD4078BFMSR 数据手册

 浏览型号CD4078BFMSR的Datasheet PDF文件第2页浏览型号CD4078BFMSR的Datasheet PDF文件第3页浏览型号CD4078BFMSR的Datasheet PDF文件第4页浏览型号CD4078BFMSR的Datasheet PDF文件第5页浏览型号CD4078BFMSR的Datasheet PDF文件第6页浏览型号CD4078BFMSR的Datasheet PDF文件第7页 
CD4078BMS  
CMOS 8 Input NOR/OR Gate  
December 1992  
CD4078BMS  
TOP VIEW  
Features  
• High Voltage Type (20V Rating)  
Pinout  
• Medium Speed Operation  
K **  
A
1
2
3
4
5
6
7
14 VDD  
13 J *  
12 H  
- tPHL, tPLH = 75ns (Typ.) at VDD = 10V  
• Buffered Inputs and Output  
B
• 5V, 10V and 15V Parametric Ratings  
• Standardized, Symmetrical Output Characteristics  
• 100% Tested for Quiescent Current at 20V  
C
11 G  
D
10 F  
NC  
VSS  
9
8
E
• Maximum Input Current of 1µA at 18V Over Full Pack-  
age Temperature Range; 100nA at 18V and +25oC  
NC  
• Noise Margin (Over Full Package/Temperature Range)  
- 1V at VDD = 5V  
**K = A + B + C + D + E + F + G + H  
J = A + B + C + D + E + F + G + H  
*
NC = NO CONNECTION  
- 2V at VDD = 10V  
- 2.5V at VDD = 15V  
Functional Diagram  
• Meets All Requirements of JEDEC Tentative Standard  
No. 13B, “Standard Specifications for Description of  
‘B’ Series CMOS Devices”  
2
A
3
B
4
C
5
Description  
CD4078BMS NOR/OR Gate provides the system designer with  
direct implementation of the positive logic 8 input NOR and OR  
functions and supplements the existing family of CMOS gates.  
1
K
D
13  
J
9
E
10  
The CD4078BMS is supplied in these 14 lead outline packages:  
F
11  
12  
J = A + B + C + D + E + F + G + H  
K = A + B + C + D + E + F + G + H  
6, 8 = NO CONNECTION  
VDD = 14  
G
H
Braze Seal DIP  
Frit Seal DIP  
H4Q  
H1B  
Ceramic Flatpack H3W  
VSS = 7  
Logic Diagram  
A
B
2
3
C
D
E
F
4
5
13  
J
9
1
K
10  
11  
12  
G
H
FIGURE 1. LOGIC DIAGRAM  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 3326  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
7-1038  

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