Datasheet > CD4053BDMS

CD4053BDMS

更新时间： 2024-11-20 20:09:23

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
12页	149K
描述
TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, CDIP16, BRAZE SEALED, DIP-16

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技术参数
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CD4053BDMS 技术参数

生命周期：	Obsolete	零件包装代码：	DIP
包装说明：	DIP,	针数：	16
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.62	模拟集成电路 - 其他类型：	SINGLE-ENDED MULTIPLEXER
JESD-30 代码：	R-CDIP-T16	JESD-609代码：	e0
标称负供电电压 (Vsup)：		信道数量：	2
功能数量：	3	端子数量：	16
最大通态电阻 (Ron)：	1050 Ω	最高工作温度：	125 °C
最低工作温度：	-55 °C	封装主体材料：	CERAMIC, METAL-SEALED COFIRED
封装代码：	DIP	封装形状：	RECTANGULAR
封装形式：	IN-LINE	认证状态：	Not Qualified
筛选级别：	MIL-PRF-38535 Class V	座面最大高度：	5.08 mm
标称供电电压 (Vsup)：	5 V	表面贴装：	NO
最长断开时间：	210 ns	最长接通时间：	320 ns
技术：	CMOS	温度等级：	MILITARY
端子面层：	TIN LEAD	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
宽度：	7.62 mm	Base Number Matches：	1

CD4053BDMS 数据手册

CD4051BMS, CD4052BMS

CD4053BMS

CMOS Analog

Multiplexers/Demultiplexers*

December 1992

Features

Description

• Logic Level Conversion

CD4051BMS, CD4052BMS and CD4053BMS analog multi-

plexers/demultiplexers are digitally controlled analog

switches having low ON impedance and very low OFF leak-

age current. Control of analog signals up to 20V peak-to-

peak can be achieved by digital signal amplitudes of 4.5V to

20V (if VDD-VSS = 3V, a VDD-VEE of up to 13V can be con-

trolled; for VDD-VEE level differences above 13V, a VDD-

VSS of at least 4.5V is required). For example, if VDD =

+4.5V, VSS = 0, and VEE = -13.5V, analog signals from -

13.5V to +4.5V can be controlled by digital inputs of 0 to 5V.

These multiplexer circuits dissipate extremely low quiescent

power over the full VDD-VSS and VDD-VEE supply voltage

• High-Voltage Types (20V Rating)

• CD4051BMS Signal 8-Channel

• CD4052BMS Differential 4-Channel

• CD4053BMS Triple 2-Channel

• Wide Range of Digital and Analog Signal Levels:

- Digital 3V to 20V

- Analog to 20Vp-p

• Low ON Resistance: 125Ω (typ) Over 15Vp-p Signal

Input Range for VDD - VEE = 15V

ranges, independent of the logic state of the control signals.

When a logic “1” is present at the inhibit input terminal all

channels are off.

• High OFF Resistance: Channel Leakage of ±100pA

(typ) at VDD - VEE = 18V

The CD4051BMS is a single 8 channel multiplexer having

three binary control inputs, A, B, and C, and an inhibit input.

The three binary signals select 1 of 8 channels to be turned

on, and connect one of the 8 inputs to the output.

• Logic Level Conversion:

- Digital Addressing Signals of 3V to 20V (VDD - VSS

= 3V to 20V)

- Switch Analog Signals to 20Vp-p (VDD - VEE = 20V);

See Introductory Text

The CD4052BMS is a differential 4 channel multiplexer hav-

ing two binary control inputs, A and B, and an inhibit input.

The two binary input signals select 1 of 4 pairs of channels

to be turned on and connect the analog inputs to the out-

puts.

• Matched Switch Characteristics: RON = 5Ω (typ) for

VDD - VEE = 15V

• Very Low Quiescent Power Dissipation Under All Digi-

tal Control Input and Supply Conditions: 0.2µW (typ)

at VDD - VSS = VDD - VEE = 10V

The CD4053BMS is a triple 2 channel multiplexer having

three separate digital control inputs, A, B, and C, and an

inhibit input. Each control input selects one of a pair of chan-

nels which are connected in a single pole double-throw con-

ﬁguration.

• Binary Address Decoding on Chip

• 5V, 10V and 15V Parametric Ratings

The CD4051BMS, CD4052BMS and CD4053BMS are supplied

in these 16 lead outline packages:

• 100% Tested for Quiescent Current at 20V

• Maximum Input Current of 1µA at 18V Over Full Pack-

age Temperature Range; 100nA at 18V and +25^oC

Braze Seal DIP

*H4X

H1E

†H4T

• Break-Before-Making Switching Eliminates Channel Frit Seal DIP

Overlap

Ceramic Flatpack

*CD4051B Only

H6W

†CD4052B, CD4053 Only

Applications

• Analog and Digital Multiplexing and Demultiplexing

• A/D and D/A Conversion

• Signal Gating

* When these devices are used as demultiplexers the “CHANNEL

IN/OUT” terminals are the outputs and the “COMMON OUT/IN” ter-

minals are the inputs.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

File Number 3316

7-937

12 3 4 5 6 7...12

中文翻译

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与CD4053BDMS相关器件

型号	品牌	获取价格	描述	数据表
CD4053BDMSH	RENESAS	获取价格	CD4053BDMSH
CD4053BDMSR	ETC	获取价格	2-Channel Analog Multiplexer
CD4053BE	TI	获取价格	CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion
CD4053BE	HARRIS	获取价格	CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion
CD4053BE	ROCHESTER	获取价格	TRIPLE 1-CHANNEL, SGL ENDED MULTIPLEXER, PDIP16, PACKAGE-16
CD4053BE98	RENESAS	获取价格	CD4053BE98
CD4053BEE4	TI	获取价格	CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion
CD4053BEX	RENESAS	获取价格	IC,ANALOG MUX,TRIPLE,2-CHANNEL,CMOS,DIP,16PIN,PLASTIC
CD4053BF	HARRIS	获取价格	CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion
CD4053BF	TI	获取价格	CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion

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