是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
零件包装代码: | DIP | 包装说明: | DIP, DIP16,.3 |
针数: | 16 | Reach Compliance Code: | not_compliant |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.64 |
系列: | 4000/14000/40000 | JESD-30 代码: | R-GDIP-T16 |
JESD-609代码: | e0 | 长度: | 31 mm |
负载电容(CL): | 50 pF | 逻辑集成电路类型: | J-K FLIP-FLOP |
最大频率@ Nom-Sup: | 3500000 Hz | 最大I(ol): | 0.00036 A |
位数: | 2 | 功能数量: | 2 |
端子数量: | 16 | 最高工作温度: | 125 °C |
最低工作温度: | -55 °C | 输出极性: | COMPLEMENTARY |
封装主体材料: | CERAMIC, GLASS-SEALED | 封装代码: | DIP |
封装等效代码: | DIP16,.3 | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 峰值回流温度(摄氏度): | NOT SPECIFIED |
电源: | 5/15 V | Prop。Delay @ Nom-Sup: | 405 ns |
传播延迟(tpd): | 405 ns | 认证状态: | Not Qualified |
筛选级别: | MIL-PRF-38535 Class V | 座面最大高度: | 0.635 mm |
子类别: | FF/Latches | 最大供电电压 (Vsup): | 18 V |
最小供电电压 (Vsup): | 3 V | 标称供电电压 (Vsup): | 5 V |
表面贴装: | NO | 技术: | CMOS |
温度等级: | MILITARY | 端子面层: | Tin/Lead (Sn/Pb) |
端子形式: | THROUGH-HOLE | 端子节距: | 2.54 mm |
端子位置: | DUAL | 处于峰值回流温度下的最长时间: | NOT SPECIFIED |
总剂量: | 100k Rad(Si) V | 触发器类型: | POSITIVE EDGE |
宽度: | 7.62 mm | 最小 fmax: | 3.5 MHz |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
CD4027BFX | RENESAS |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,CMOS,DIP,16PIN,CERAMIC | |
CD4027BFX | ROCHESTER |
获取价格 |
J-K Flip-Flop, 4000/14000/40000 Series, 2-Func, Positive Edge Triggered, 2-Bit, Complement | |
CD4027BH | ETC |
获取价格 |
Logic IC | |
CD4027BK | RENESAS |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,CMOS,FP,16PIN,CERAMIC | |
CD4027BK | ROCHESTER |
获取价格 |
J-K Flip-Flop, 4000/14000/40000 Series, 2-Func, Positive Edge Triggered, 2-Bit, Complement | |
CD4027BK3 | ROCHESTER |
获取价格 |
J-K Flip-Flop, 4000/14000/40000 Series, 2-Func, Positive Edge Triggered, 2-Bit, Complement | |
CD4027BKMSR | RENESAS |
获取价格 |
4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, | |
CD4027BM | TI |
获取价格 |
CMOS DUAL J-K MASTER-SLAVER FLIP-FLOP | |
CD4027BM | NSC |
获取价格 |
Dual J-K Master/Slave Flip-Flop with Set and Reset | |
CD4027BM96 | TI |
获取价格 |
CMOS DUAL J-K MASTER-SLAVER FLIP-FLOP |