Datasheet > CD40175BMN

CD40175BMN

更新时间： 2024-11-14 23:40:23

品牌	Logo	应用领域
其他 - ETC		触发器逻辑集成电路光电二极管
页数	文件大小	规格书
6页	137K
描述
Quad D-Type Flip-Flop

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数据手册

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CD40175BMN 数据手册

February 1988

CD40174BM/CD40174BC Hex D Flip-Flop

CD40175BM/CD40175BC Quad D Flip-Flop

General Description

The CD40174B consists of six positive-edge triggered

D-type flip-flops; the true outputs from each flip-flop are ex-

ternally available. The CD40175B consists of four positive-

edge triggered D-type flip-flops; both the true and comple-

ment outputs from each flip-flop are externally available.

All inputs are protected from static discharge by diode

clamps to V and V

Features

Wide supply voltage range

High noise immunity

Low power TTL

3V to 15V

0.45 V (typ.)

All flip-flops are controlled by a common clock and a com-

mon clear. Information at the D inputs meeting the set-up

time requirements is transferred to the Q outputs on the

positive-going edge of the clock pulse. The clearing opera-

tion, enabled by a negative pulse at Clear input, clears all Q

outputs to logical ‘‘0’’ and Qs (CD40175B only) to logical ‘‘1’’.

fan out of 2 driving 74L

or 1 driving 74 LS

compatibility

Equivalent to MC14174B, MC14175B

Equivalent to MM74C174, MM74C175

Connection Diagrams

CD40174B

Dual-In-Line Package

CD40175B

Dual-In-Line Package

TL/F/5987–1

TL/F/5987–2

Top View

Order Number CD40174B or CD40175B

Truth Table

Inputs

Clock

Outputs

Clear

High level

Low level

Irrelevant

Transition from low to high level

No change

Q for CD40175B only

1995 National Semiconductor Corporation

TL/F/5987

RRD-B30M105/Printed in U. S. A.

12 3 4 5 6

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