CAT24C512
512 kb I2C CMOS Serial
EEPROM
Description
The CAT24C512 is a 512 kb Serial CMOS EEPROM, internally
organized as 65,536 words of 8 bits each.
http://onsemi.com
It features a 128−byte page write buffer and supports the Standard
2
(100 kHz), Fast (400 kHz) and Fast−Plus (1 MHz) I C protocol.
Write operations can be inhibited by taking the WP pin High (this
protects the entire memory).
External address pins make it possible to address up to eight
CAT24C512 devices on the same bus.
SOIC−8
W SUFFIX
CASE 751BD
UDFN−8
HU5 SUFFIX
CASE 517BU
SOIC−8
X SUFFIX
CASE 751BE
Features
2
• Supports Standard, Fast and Fast−Plus I C Protocol
• 1.8 V to 5.5 V Supply Voltage Range
• 128−Byte Page Write Buffer
• Hardware Write Protection for Entire Memory
PDIP−8
L SUFFIX
CASE 646AA
TSSOP−8
Y SUFFIX
CASE 948AL
MSOP−8
Z SUFFIX
CASE 846AD
2
• Schmitt Triggers and Noise Suppression Filters on I C Bus Inputs
(SCL and SDA)
• Low Power CMOS Technology
• 1,000,000 Program/Erase Cycles
• 100 Year Data Retention
• Industrial and Extended Temperature Range
• 8−pin PDIP, SOIC, TSSOP, MSOP and 8−pad UDFN Packages
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
PIN CONFIGURATION
1
A
0
A
1
A
2
V
CC
WP
SCL
SDA
V
SS
PDIP (L), SOIC (W, X),
TSSOP (Y), MSOP (Z), UDFN (HU5)
V
CC
For the location of Pin 1, please consult the
corresponding package drawing.
SCL
PIN FUNCTION
CAT24C512
SDA
A , A , A
2
1
0
Pin Name
Function
Device Address
WP
A , A , A
0
1
2
SDA
Serial Data
Serial Clock
Write Protect
Power Supply
Ground
SCL
WP
V
SS
Figure 1. Functional Symbol
V
CC
V
SS
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 16 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
November, 2011 − Rev. 3
CAT24C512/D