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CAT24C128YIT3

更新时间: 2024-09-10 03:11:51
品牌 Logo 应用领域
CATALYST 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
17页 521K
描述
128-Kb I2C CMOS Serial EEPROM

CAT24C128YIT3 数据手册

 浏览型号CAT24C128YIT3的Datasheet PDF文件第2页浏览型号CAT24C128YIT3的Datasheet PDF文件第3页浏览型号CAT24C128YIT3的Datasheet PDF文件第4页浏览型号CAT24C128YIT3的Datasheet PDF文件第5页浏览型号CAT24C128YIT3的Datasheet PDF文件第6页浏览型号CAT24C128YIT3的Datasheet PDF文件第7页 
CAT24C128  
128-Kb I
2
C CMOS Serial EEPROM  
FEATURES  
DEVICE DESCRIPTION  
Supports Standard and Fast I2C Protocol  
1.8V to 5.5V Supply Voltage Range  
64-Byte Page Write Buffer  
The CAT24C128 is a 128-Kb Serial CMOS EEPROM,  
internally organized as 256 pages of 64 bytes each, for  
a total of 16,384 bytes of 8 bits each.  
It features a 64-byte page write buffer and supports  
both the Standard (100 kHz) as well as Fast (400 kHz)  
I2C protocol.  
Hardware Write Protection for entire memory  
Schmitt Triggers and Noise Suppression Filters  
on I2C Bus Inputs (SCL and SDA).  
Write operations can be inhibited by taking the WP pin  
High (this protects the entire memory).  
Low power CMOS technology  
1,000,000 program/erase cycles  
100 year data retention  
Industrial temperature range  
RoHS-compliant 8-lead PDIP, SOIC and TSSOP  
packages  
PIN CONFIGURATION  
FUNCTIONAL SYMBOL  
PDIP (L)  
SOIC (W)  
TSSOP (Y)  
V
CC  
A
1
8
V
CC  
0
SCL  
A
2
3
4
7
6
5
WP  
1
2
A
SCL  
SDA  
V
SS  
A , A , A  
CAT24C128  
SDA  
2
1
0
For the location of Pin 1, please consult the  
corresponding package drawing.  
WP  
PIN FUNCTIONS  
V
SS  
A0, A1, A2  
SDA  
SCL  
Device Address Inputs  
Serial Data Input/Output  
Serial Clock Input  
Write Protect Input  
Power Supply  
WP  
VCC  
VSS  
Ground  
* Catalyst carries the I2C protocol under a license from the Philips Corporation.  
© 2006 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 1103, Rev. G  
1

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