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BU9880GUL-WE2 PDF预览

BU9880GUL-WE2

更新时间: 2024-01-24 04:18:29
品牌 Logo 应用领域
罗姆 - ROHM 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
17页 397K
描述
WL-CSP EEPROM family I2C BUS

BU9880GUL-WE2 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:BGA
包装说明:ROHS COMPLIANT, WLCSP-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.51Factory Lead Time:16 weeks
风险等级:1.8最大时钟频率 (fCLK):0.4 MHz
数据保留时间-最小值:40耐久性:1000000 Write/Erase Cycles
I2C控制字节:1010000RJESD-30 代码:R-PBGA-B8
长度:1.98 mm内存密度:65536 bit
内存集成电路类型:EEPROM内存宽度:8
功能数量:1端子数量:8
字数:8192 words字数代码:8000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:8KX8
封装主体材料:PLASTIC/EPOXY封装代码:VFBGA
封装等效代码:BGA8,3X3,20封装形状:RECTANGULAR
封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH并行/串行:SERIAL
峰值回流温度(摄氏度):NOT SPECIFIED电源:1.8/5 V
认证状态:Not Qualified座面最大高度:0.55 mm
串行总线类型:I2C最大待机电流:0.000002 A
子类别:EEPROMs最大压摆率:0.002 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.7 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:BALL端子节距:0.5 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:1.58 mm最长写入周期时间 (tWC):5 ms
写保护:HARDWARE

BU9880GUL-WE2 数据手册

 浏览型号BU9880GUL-WE2的Datasheet PDF文件第4页浏览型号BU9880GUL-WE2的Datasheet PDF文件第5页浏览型号BU9880GUL-WE2的Datasheet PDF文件第6页浏览型号BU9880GUL-WE2的Datasheet PDF文件第8页浏览型号BU9880GUL-WE2的Datasheet PDF文件第9页浏览型号BU9880GUL-WE2的Datasheet PDF文件第10页 
Technical Note  
BU9880GUL-W  
I2C BUS communication  
I2C BUS data communication  
I2C BUS data communication starts by start condition input, and ends by stop condition input. Data is always 8bit long,  
and acknowledge is always required after each byte.  
I2C BUS carries out data transmission with plural devices connected by 2 communication lines of serial data (SDA) and  
serial clock (SCL).  
Among devices, there are “master” that generates clock and control communication start and end, and “slave” that is  
controlled by addresses peculiar to devices.  
EEPROM becomes “slave”. And the device that outputs data to bus during data communication is called “transmitter”,  
and the device that receives data is called “receiver”.  
SDA  
1-7  
1-7  
1-7  
8
9
8
9
8
9
SCL  
S
P
START ADDRESS R/W ACK  
condition  
DATA  
ACK  
DATA  
ACK STOP  
condition  
Fig.32 Data transfer timing  
Start condition (start bit recognition)  
Before executing each command, start condition (start bit) where SDA goes from 'HIGH' down to 'LOW' when SCL is  
'HIGH' is necessary.  
This IC always detects whether SDA and SCL are in start condition (start bit) or not, therefore, unless this condition is  
satisfied, any command is executed.  
Stop condition (stop bit recognition)  
Each command can be ended by SDA rising from 'LOW' to 'HIGH' when stop condition (stop bit), namely, SCL is 'HIGH'  
Acknowledge (ACK) signal  
This acknowledge (ACK) signal is a software rule to show whether data transfer has been made normally or not. In  
master and slave, the device (µ-COM at slave address input of write command, read command, and this IC at data  
output of read command) at the transmitter (sending) side releases the bus after output of 8bit data.  
The device (this IC at slave address input of write command, read command, and µ-COM at data output of read  
command) at the receiver (receiving) side sets SDA 'LOW' during 9 clock cycles, and outputs acknowledge signal (ACK  
signal) showing that it has received the 8bit data.  
This IC, after recognizing start condition and slave address (8bit), outputs acknowledge signal (ACK signal) 'LOW'.  
Each write action outputs acknowledge signal) (ACK signal) 'LOW', at receiving 8bit data (word address and write data).  
Each read action outputs 8bit data (read data), and detects acknowledge signal (ACK signal) 'LOW'. When  
acknowledge signal (ACK signal) is detected, and stop condition is not sent from the master (µ-COM) side, this IC  
continues data output. When acknowledge signal (ACK signal) is not detected, this IC stops data transfer, and  
recognizes stop condition (stop bit), and ends read action. And this IC gets in standby status.  
Device addressing  
Output slave address after start condition from master.  
The significant 4 bits of slave address are used for recognizing a device type.  
The device code of this IC is fixed to '1010'.  
The most insignificant bit (R / W --- READ/ WRITE ) of slave address is used for designating write or read action,  
and is as shown below.  
Setting R / W to 0 --- write (setting 0 to word address setting of random read)  
Setting R / W to 1 --- read  
Type  
Slave address  
BU9880GUL-W  
1
0
1
0
0
0
0
R / W  
www.rohm.com  
© 2010 ROHM Co., Ltd. All rights reserved.  
2010.11 - Rev.A  
7/16  

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