BU9880GUL-W

更新时间： 2024-02-11 12:41:46

品牌	Logo	应用领域
罗姆 - ROHM		/
页数	文件大小	规格书
5页	124K
描述
Silicon Monolithic Integrated Circuit

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数据手册

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BU9880GUL-W 数据手册

2/4

◇ MEMORY CELL CHARACTERISTICS (Ta=25℃, Vcc=1.7～5.5V)

Specification

Parameter

Unit

Min.

1,000,000

Typ.

Max.

Write/Erase Cycle

Data Retention

Cycles

Years

○Initial Data FFh in all address.

*1 Not 100% TESTED

◇ DC OPERATING CHARACTERISTICS

(Unless otherwise specified Ta=-40～85℃, Vcc=1.7～5.5V)

◇ AC OPERATING CHARACTERISTICS

(Unless otherwise specified Ta=-40～85℃, Vcc=1.7～5.5V)

Specification

Parameter

Symbol

Unit

Test Condition

Parameter

Symbol

Unit

Min. Typ. Max.

"H" Input Voltage1

"L" Input Voltage1

VIH1 0.7Vcc

－

Vcc+1.0

fSCL

－

0.6

1.2

－

400 kHz

Clock Frequency

VIL1

-0.3

－

0.3Vcc

tHIGH

tLOW

－

μs

Data Clock High Period

Data Clock Low Period

SDA and SCL Rise Time

SDA and SCL Fall Time

Start Condition Hold Time

Start Condition Setup Time

Input Data Hold Time

Input Data Setup Time

Output Data Delay Time

Output Data Hold Time

Stop Condition Setup Time

Bus Free Time

"L" Output Voltage1 VOL1

"L" Output Voltage2 VOL2

Input Leakage Current ILI

0.4

0.2

IOL=3.0mA，2.5V≦Vcc≦5.5V（SDA）

IOL=0.7mA，1.7V≦Vcc＜2.5V（SDA）

－

0.3 μs

-1

μA VIN=0V～Vcc

－

Output Leakage Current

ILO

-1

μA VOUT=0V～Vcc（SDA）

tHD:STA

tSU:STA

tHD:DAT

tSU:DAT

tPD

0.6

－

μs

Vcc=5.5V,fSCL=400ｋHz，tWR=5ms

ICC1

－

2.0

0.5

2.0

Byte Write,Page Write

Operating Current

Vcc=5.5V,fSCL=400ｋHz

100

0.1

0.6

1.2

－

ICC2

ISB

Random Read,Current Read,Sequential Read

0.9 μs

Vcc=5.5V,SDA,SCL=Vcc

μA

A0,A1,A2=GND,WP=GND

tDH

－

μs

Standby Current

tSU:STO

tBUF

tWR

Write Cycle Time

○This product is not designed for protection against

○radioactive rays.

－

0.1 μs

Noise Spike Width (SDA and SCL)

WP Hold Time

tHD：WP

tSU：WP

tHIGH：WP

－

0.1

1.0

μs

WP Setup Time

WP High Period

*1 Not 100% TESTED

◇ BLOCKꢀDIAGRAM

◇ PIN No., PIN NAME

PIN No. PIN NAME

A0 B3

A1 C3

64Kbit EEPROM ARRAY

SLAVE, WORD

A3 Vcc

SCL

Vcc

GND

SDA

13bit

8bit

ADDRESS

DECODER

DATA

A2 WP

A1 SCL

B1 SDA

13bit

ADDRESS REGISTER

START

CONTROL LOGIC

STOP

A2 C2

ACK

GND C1

HIGH VOLTAGE GEN.

VCC LEVEL DETECT

Fig.-1ꢀBLOCKꢀDIAGRAM

REV. A

123 4 5

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