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BSH206 PDF预览

BSH206

更新时间: 2024-09-28 22:27:55
品牌 Logo 应用领域
恩智浦 - NXP 晶体晶体管
页数 文件大小 规格书
7页 147K
描述
P-channel enhancement mode MOS transistor

BSH206 数据手册

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Philips Semiconductors  
Product specification  
P-channel enhancement mode  
MOS transistor  
BSH206  
FEATURES  
SYMBOL  
QUICK REFERENCE DATA  
s
• Very low threshold voltage  
• Fast switching  
VDS = -12 V  
• Logic level compatible  
• Subminiature surface mount  
package  
ID = -0.75 A  
g
R
DS(ON) 0.5 (VGS = -2.5 V)  
VGS(TO) 0.4 V  
d
GENERAL DESCRIPTION  
PINNING  
SOT363  
P-channel, enhancement mode,  
logic level, field-effect power  
transistor. This device has low  
threshold voltage and extremely  
fast switching making it ideal for  
battery powered applications and  
high speed digital interfacing.  
PIN  
DESCRIPTION  
6
5
4
1,2,5,6 drain  
Top view  
3
4
gate  
source  
1
2
3
The BSH206 is supplied in the  
SOT363 subminiature surface  
mounting package.  
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
VDS  
VDGR  
VGS  
ID  
Drain-source voltage  
-
-
-
-
-
-
-
-
-12  
-12  
± 8  
-0.75  
-0.47  
-3  
0.417  
0.17  
150  
V
V
V
A
A
Drain-gate voltage  
Gate-source voltage  
Drain current (DC)  
RGS = 20 kΩ  
Ta = 25 ˚C  
Ta = 100 ˚C  
Ta = 25 ˚C  
Ta = 25 ˚C  
Ta = 100 ˚C  
IDM  
Ptot  
Drain current (pulse peak value)  
Total power dissipation  
A
W
W
˚C  
Tstg, Tj  
Storage & operating temperature  
- 55  
THERMAL RESISTANCES  
SYMBOL PARAMETER  
CONDITIONS  
TYP.  
MAX.  
UNIT  
Rth j-a  
Thermal resistance junction to  
ambient  
FR4 board, minimum  
footprint  
300  
-
K/W  
August 1998  
1
Rev 1.000  

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