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BS62LV1603FIG55 PDF预览

BS62LV1603FIG55

更新时间: 2024-11-06 22:14:07
品牌 Logo 应用领域
BSI 存储内存集成电路静态存储器
页数 文件大小 规格书
9页 264K
描述
Very Low Power/Voltage CMOS SRAM 2M X 8 bit

BS62LV1603FIG55 技术参数

是否Rohs认证:符合生命周期:Obsolete
包装说明:LFBGA, BGA48,6X8,30Reach Compliance Code:unknown
风险等级:5.84Is Samacsys:N
最长访问时间:55 nsI/O 类型:COMMON
JESD-30 代码:R-PBGA-B48JESD-609代码:e1
长度:12 mm内存密度:16777216 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:48字数:2097152 words
字数代码:2000000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:2MX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装等效代码:BGA48,6X8,30封装形状:RECTANGULAR
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH并行/串行:PARALLEL
电源:3/3.3 V认证状态:Not Qualified
座面最大高度:1.4 mm最小待机电流:1.5 V
子类别:SRAMs最大压摆率:0.046 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Silver/Copper (Sn95.5Ag3.8Cu0.7)端子形式:BALL
端子节距:0.75 mm端子位置:BOTTOM
宽度:9 mmBase Number Matches:1

BS62LV1603FIG55 数据手册

 浏览型号BS62LV1603FIG55的Datasheet PDF文件第2页浏览型号BS62LV1603FIG55的Datasheet PDF文件第3页浏览型号BS62LV1603FIG55的Datasheet PDF文件第4页浏览型号BS62LV1603FIG55的Datasheet PDF文件第5页浏览型号BS62LV1603FIG55的Datasheet PDF文件第6页浏览型号BS62LV1603FIG55的Datasheet PDF文件第7页 
Very Low Power/Voltage CMOS SRAM  
2M X 8 bit  
BSI  
BS62LV1603  
„ FEATURES  
„ GENERAL DESCRIPTION  
• Vcc operation voltage : 2.7V ~ 3.6V  
• Very low power consumption :  
The BS62LV1603 is a high performance , very low power CMOS Static  
Random Access Memory organized as 2048K words by 8 bits and  
operates from a range of 2.7V to 3.6V supply voltage.  
Advanced CMOS technology and circuit techniques provide both high  
speed and low power features with a typical CMOS standby current of  
3.0uA at 3.0V/25oC and maximum access time of 55ns at 3.0V/85oC.  
Easy memory expansion is provided by an active LOW chip enable(CE1)  
, an active HIGH chip enable (CE2) and active LOW output enable (OE)  
and three-state output drivers.  
Vcc = 3.0V C-grade: 45mA (@55ns) operating current  
I -grade: 46mA (@55ns) operating current  
C-grade: 36mA (@70ns) operating current  
I -grade: 37mA (@70ns) operating current  
3.0uA (Typ.) CMOS standby current  
• High speed access time :  
-55  
-70  
55ns  
70ns  
The BS62LV1603 has an automatic power down feature, reducing the  
power consumption significantly when chip is deselected.  
The BS62LV1603 is available in 48B BGA and 44L TSOP2 packages.  
• Automatic power down when chip is deselected  
• Three state outputs and TTL compatible  
• Fully static operation  
• Data retention supply voltage as low as 1.5V  
• Easy expansion with CE1, CE2 and OE options  
„ PRODUCT FAMILY  
POWER DISSIPATION  
SPEED  
( ns )  
STANDBY  
Operating  
PRODUCT  
FAMILY  
OPERATING  
TEMPERATURE  
Vcc  
RANGE  
( ICCSB1, Max )  
( ICC, Max )  
PKG TYPE  
Vcc=3V  
70ns  
Vcc=3V  
55ns  
55ns : 3.0~3.6V  
70ns : 2.7~3.6V  
Vcc=3V  
10uA  
BS62LV1603EC  
BS62LV1603FC  
BS62LV1603EI  
BS62LV1603FI  
TSOP2-44  
BGA-48-0912  
TSOP2-44  
+0O C to +70OC 2.7V ~ 3.6V  
-40OC to +85OC 2.7V ~ 3.6V  
55 / 70  
55 / 70  
45mA  
46mA  
36mA  
20uA  
37mA  
BGA-48-0912  
„ PIN CONFIGURATIONS  
„ FUNCTIONAL BLOCK DIAGRAM  
1
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
A4  
A3  
A2  
A1  
A0  
CE1  
NC  
NC  
DQ0  
DQ1  
VCC  
GND  
DQ2  
DQ3  
NC  
A20  
A5  
A6  
A7  
OE  
CE2  
A8  
NC  
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
A20  
A13  
A17  
NC  
DQ7  
DQ6  
GND  
VCC  
DQ5  
DQ4  
NC  
BS62LV1603EC  
BS62LV1603EI  
A15  
Address  
Memory Array  
A18  
A16  
A14  
A12  
A7  
24  
4096  
Row  
Input  
4096 X 4096  
Decoder  
NC  
A9  
Buffer  
WE  
A19  
A18  
A17  
A16  
A15  
18  
19  
20  
21  
A6  
A5  
A4  
A10  
A11  
A12  
A13  
A14  
22  
4096  
DQ0  
DQ1  
DQ2  
DQ3  
DQ4  
DQ5  
DQ6  
DQ7  
8
Data  
Input  
Buffer  
1
2
3
4
5
6
8
Column I/O  
Write Driver  
Sense Amp  
A
B
C
D
E
F
OE  
A0  
A1  
A2  
CE2  
NC  
NC  
NC  
8
8
Data  
Output  
Buffer  
NC  
NC  
A3  
A5  
A4  
CE1  
NC  
512  
A6  
D0  
D4  
Column Decoder  
18  
VSS  
A17  
VCC  
A7  
VCC  
VSS  
D1  
D2  
D5  
D6  
CE1  
CE2  
WE  
OE  
Control  
A16  
A15  
A13  
A10  
VCC  
D3  
Address Input Buffer  
D7  
NC  
NC  
NC  
WE  
A11  
A14  
A12  
A9  
Vdd  
Gnd  
A11A9 A8 A3 A2 A1 A0A10 A19  
A20  
G
H
NC  
A18  
A8  
A19  
48-ball BGA top view  
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.  
Revision 1.1  
Jan. 2004  
R0201-BS62LV1603  
1

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