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BS616LV8018FI70 PDF预览

BS616LV8018FI70

更新时间: 2024-11-13 14:41:11
品牌 Logo 应用领域
BSI 静态存储器内存集成电路
页数 文件大小 规格书
8页 254K
描述
Standard SRAM, 512KX16, 70ns, CMOS, PBGA48

BS616LV8018FI70 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:FBGA, BGA48,6X8,30Reach Compliance Code:unknown
风险等级:5.92最长访问时间:70 ns
I/O 类型:COMMONJESD-30 代码:R-PBGA-B48
JESD-609代码:e0内存密度:8388608 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
湿度敏感等级:3端子数量:48
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:512KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:FBGA封装等效代码:BGA48,6X8,30
封装形状:RECTANGULAR封装形式:GRID ARRAY, FINE PITCH
并行/串行:PARALLEL电源:5 V
认证状态:Not Qualified最大待机电流:0.0000025 A
最小待机电流:1.5 V子类别:SRAMs
最大压摆率:0.061 mA标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:0.75 mm
端子位置:BOTTOMBase Number Matches:1

BS616LV8018FI70 数据手册

 浏览型号BS616LV8018FI70的Datasheet PDF文件第2页浏览型号BS616LV8018FI70的Datasheet PDF文件第3页浏览型号BS616LV8018FI70的Datasheet PDF文件第4页浏览型号BS616LV8018FI70的Datasheet PDF文件第5页浏览型号BS616LV8018FI70的Datasheet PDF文件第6页浏览型号BS616LV8018FI70的Datasheet PDF文件第7页 
Very Low Power/Voltage CMOS SRAM  
512K X 16 bit  
(Dual CE Pins)  
BSI  
BS616LV8018  
„ FEATURES  
„ DESCRIPTION  
The BS616LV8018 is a high performance, very low power CMOS Static  
Random Access Memory organized as 524,288 words by 16 bits and  
operates from a range of 4.5V to 5.5V supply voltage.  
Advanced CMOS technology and circuit techniques provide both high  
speed and low power features with a typical CMOS standby current  
of 8.0uA at 5V/25oC and maximum access time of 55ns at 5.0V/85oC.  
Easy memory expansion is provided by an active LOW chip enable(CE1)  
, active HIGH chip enable (CE2), active LOW output enable(OE) and  
three-state output drivers.  
• Vcc operation voltage : 4.5~5.5V  
• Very low power consumption :  
Vcc = 5.0V C-grade: 75mA (@55ns) operating current  
I -grade: 76mA (@55ns) operating current  
C-grade: 60mA (@70ns) operating current  
I -grade: 61mA (@70ns) operating current  
8.0uA (Typ.) CMOS standby current  
• High speed access time :  
-55  
The BS616LV8018 has an automatic power down feature, reducing the  
power consumption significantly when chip is deselected.  
The BS616LV8018 is available in 48-pin BGA package.  
-70  
• Automatic power down when chip is deselected  
• Three state outputs and TTL compatible  
• Fully static operation  
• Data retention supply voltage as low as 1.5V  
• Easy expansion with CE2,CE1 and OE options  
• I/O Configuration x8/x16 selectable by LB and UB pin  
„ PRODUCT FAMILY  
POWER DISSIPATION  
SPEED  
(ns)  
STANDBY  
Operating  
OPERATING  
TEMPERATURE  
Vcc  
RANGE  
(ICCSB1, Max)  
(ICC, Max)  
PRODUCT FAMILY  
PKG TYPE  
55ns : 4.5~5.5V  
70ns : 4.5~5.5V  
Vcc=5V  
Vcc=5V  
70ns  
Vcc=5V  
55uA  
55ns  
BS616LV8018FC  
BS616LV8018FI  
+0 O C to +70O  
-40O C to +85O  
C
C
4.5V ~ 5.5V  
4.5V ~ 5.5V  
55 / 70  
55 / 70  
75mA  
60mA  
61mA  
BGA-48-0912  
BGA-48-0912  
uA  
110  
76mA  
„ PIN CONFIGURATIONS  
„ BLOCK DIAGRAM  
A4  
A3  
A2  
1
2
3
4
5
6
A1  
A0  
Address  
Input  
A
B
C
D
LB  
OE  
A0  
A1  
A2  
CE2  
22  
2048  
A17  
A16  
Row  
Decoder  
Memory Array  
2048 x 4096  
Buffer  
D8  
D9  
UB  
A3  
A5  
A4  
A6  
CE1  
D1  
D0  
D2  
A15  
A14  
A13  
A12  
D10  
4096  
Data  
Input  
Buffer  
16  
16  
Column I/O  
D0  
VSS D11  
VCC D12  
A17  
A7  
D3  
D4  
VCC  
.
.
.
.
.
.
.
.
Write Driver  
Sense Amp  
16  
256  
A16  
A15  
A13  
A10  
Data  
Output  
Buffer  
VSS  
A14  
VSS  
D6  
E
F
16  
Column Decoder  
D15  
D5  
D14  
D15  
A18  
D13  
CE2  
16  
CE1  
WE  
OE  
WE  
A11  
D7  
A12  
A9  
G
H
N.C  
A8  
Control  
Address Input Buffer  
UB  
LB  
A11 A10 A9 A8 A7  
A6 A5 A18  
NC  
Vcc  
Vss  
48-Ball CSP top View  
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.  
Revision 2.1  
R0201-BS616LV8018  
1
Jan.  
2004  

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