NXP Semiconductors
BGU8822/A
Dual channel low-noise high linearity amplifier with DSA and SPDT
8 Functional description
8.1 Direct-Access Functionality for Main and Diversity Channels in TDD
Systems
In addition to SPI in TDD systems the LNAs and DSA can also be controlled via direct-
access pins. Pins 32 and 24 are used for Direct Disable mode for Main and Diversity
channels correspondingly.
Pins 9 and 23 are used for Direct DSA Attenuation mode for Main and Diversity channels
correspondingly.
By default, the BGU8822/A starts up in direct-access mode. SPI bus remains fully
functional. <VDD_SPI> pin has to be connected to power supply. Reset command
<SPI_RST> must be applied.
8.1.1 Direct Disable mode
In Direct Disable mode Main and Diversity channels can be disabled independently
without accessing SPI bus.
Pin 32 < Disable Main Channel> shall be set to HIGH to disable Main channel (LNA1_M
and LNA2_M of the Main channel are disabled (set in low current mode).
Pin 24 < Disable Diversity Channel> shall be set to HIGH to disable Diversity channel
(LNA1_D and LNA2_D of the Diversity channel are disabled (set in low current mode).
VIH voltage for those pins is limited to 2.75 V, as indicated in Table 31.
Direct Disable mode functionality has similar effect as if both LNA1 and LNA2 of Main or
Diversity channels have been disabled via LNA Enable bits (register 0x10h, bits [7-6] for
Main channel and bits [5-4] for Diversity channel).
8.1.2 Direct DSA Attenuation mode
In Direct DSA Attenuation mode, Main and Diversity DSAs can be toggled independently
without accessing SPI bus.
Pin 9 <DSA_0_X_dB Main> can be toggled to set DSA_M between Minimum Attenuation
(level LOW) and predefined X dB attenuation (level HIGH). X dB attenuation is defined in
DSA_M_TDD_ATTN (register 0x16h, bits [6-2]). Default reset value is 15 dB.
BGU8822/A
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© NXP B.V. 2020. All rights reserved.
Product data sheet
Rev. 6 — 15 April 2020
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