Datasheet
Analog Sound Processors series
Sound Processor for car audio
built-in High-Voltage function and
2nd order post filter
BD37068FV-M
General Description
Key Specifications(Note1)
TotalHarmonic Distortion:
Maximum Input Voltage:
It is built-in input selector of 6 stereo source and output
to ADC after adjusting signal level. And built-in 2nd order
post filter to reduce out of band noise and 6ch Volume
circuit. It is possible to out until 5.2VRMS at maximum
output. (High Voltage function) Moreover, it is simple to
design set by built-in TDMA noise reduction systems.
0.003%(Typ)
2.2VRMS(Typ)
55dB(Min)
5.2VRMS(Typ)
23μVRMS(Typ)
Common Mode Rejection Ratio:
Maximum Output Voltage:
Output Noise Voltage:
Residual Output Noise Voltage: 10.5μVRMS(Typ)
Ripple Rejection:
Operating Temperature Range:
-70dB (Typ)
-40˚C to +85˚C
Features
AEC-Q100 (Grade3) Qualified
Built-in differential input selector that can select
single-ended / differential input
(Note1) These specifications are condition of High-Voltage ON.
Reduce the pop noise when switching gain due to
built-in advanced switch circuit
Package
W(Typ) x D(Typ) x H(Max)
13.60mm x 7.80mm x 2.00mm
Less out-of-band noise of DAC by built-in 2nd order
post filter.
SSOP-B40
Built-in buffered ground isolation amplifier to realize
high CMRR characteristics
Built-in TDMA noise reduction circuit reduces the
additional components for external filter.
It is possible to output 5.2VRMS by High-Voltage
function
Package is SSOP-B40. Putting same direction
input-terminals and output-terminals make PCB
layout easier and PCB area smaller.
Available to control by 3.3V/5V for I2C-bus
controller
Applications
It is the optimal for the car audio. Besides, it is
possible to use for the audio equipment of mini
Compo, micro Compo.
SSOP-B40
Typical Application Circuit
VCCL
10µF
VCCH
INC
INS
IG1
IG2
OUTC OUTS OUTR1 OUTR2 OUTF1 OUTF2 INF2 INF1 INR2
INR1
GND SDA SCL
10µF
10µF 10µF 10µF 10µF
10µF 10µF
35
2.2µF 10µF 10µF
2.2µF
2.2µF 2.2µF 2.2µF 2.2µF
10µF
VREF
40
39
38
37
34
33
32
31
30
29
28
27
26
24
22
25
23
21
36
Level
Shift
Level
Shift
Level
Shift
Level
Shift
Level
Shift
Level
Shift
VREF
100kΩ
100kΩ
100kΩ
100kΩ
100kΩ
100kΩ
I2C-bus LOGIC
Front mixing
Sub
Selector
★
★
■Fader : +23dB to -79dB、-∞/1dBstep
■Input Gain : +23dB to -15dB/1dBstep
Sub
Gain adjust
Main Gain adjust
Fader
Fader
Fader
Fader
Fader
Fader
■Front Mixing : on/off
ATT★
ATT★
ATT★
ATT★
ATT★
ATT★
★ Advanced Switch
2nd order LPF
■2nd order LPF: fc=70kHz
■Main/Sub Gain Adjust 0dB/6dB
■Anti-TDMA noise circuit
■High-Voltage Output
Fader
Fader
Fader
Fader
Fader
Fader
Boost★
Boost★
Boost★
Boost★
Boost★
Boost★
Rear
Selector
Front
Selector
★
Input Gain
Input selector (1 single
GND
-
end and
GND
5 stereo ISO)
Differential
amp
Differential
amp
GND
ISO
GND
ISO
GND
ISO
GND
GND
ISO
GND
ISO
amp
amp
amp
amp
amp
ISO
amp
ISO
amp
amp
ISO
250kΩ 250kΩ
250kΩ 250kΩ
250kΩ
250kΩ 250kΩ
250kΩ
250kΩ
250kΩ
250kΩ
250kΩ
250kΩ
250kΩ
100kΩ
100kΩ 100kΩ 250kΩ 250kΩ
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
2.2µF
2.2µF
2.2µF 2.2µF 2.2µF 10µF 2.2µF 2.2µF 10µF 2.2µF 2.2µF 10µF 2.2µF 2.2µF 10µF
BP2 CP1 CN CP2 DP1 DN DP2 EP1 EN EP2 FP1 FN1
10µF
10µF
2.2µF 2.2µF
MIN
BN
HIVOLB
A1
A2
BP1
FN2
FP2
Figure 1. Typical Application Circuit
○Product structure:Silicon monolithic integrated circuit ○This product is not designed protection against radioactive rays.
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TSZ02201-0C2C0E100130-1-2
14.NOV.2016 Rev.002
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