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AT93C46A-10TI2.7 PDF预览

AT93C46A-10TI2.7

更新时间: 2024-09-09 03:18:15
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器电动程控只读存储器电可擦编程只读存储器光电二极管
页数 文件大小 规格书
15页 198K
描述
64X16 MICROWIRE BUS SERIAL EEPROM, PDIP8, 0.300 INCH, PLASTIC, MS-001BA, DIP-8

AT93C46A-10TI2.7 数据手册

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Features  
Medium-voltage and Standard-voltage Operation  
– 5.0 (VCC = 4.5V to 5.5V)  
– 2.7 (VCC = 2.7V to 5.5V)  
User-selectable Internal Organization  
– 1K: 128 x 8 or 64 x 16  
– 2K: 256 x 8 or 128 x 16  
– 4K: 512 x 8 or 256 x 16  
Three-wire Serial Interface  
2 MHz Clock Rate (5V)  
Self-timed Write Cycle (10 ms max)  
High Reliability  
– Endurance: 1 Million Write Cycles  
– Data Retention: 100 Years  
8-lead PDIP and 8-lead JEDEC SOIC Packages  
Three-wire  
Serial  
Automotive  
EEPROMs  
Description  
The AT93C46/56/66 provides 1024/2048/4096 bits of serial electrically erasable pro-  
grammable read only memory (EEPROM) organized as 64/128/256 words of 16 bits  
each, when the ORG pin is connected to VCC and 128/256/512 words of 8 bits each  
when it is tied to ground. The device is optimized for use in many automotive applica-  
tions where low power and low voltage operations are essential. The AT93C46/56/66  
is available in space-saving 8-lead PDIP and 8-lead JEDEC SOIC packages. The  
AT93C46/56/66 is enabled through the Chip Select pin (CS), and accessed via a  
3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock  
(SK). Upon receiving a Read instruction at DI, the address is decoded and the data is  
clocked out serially on the data output pin DO. The WRITE cycle is completely self-  
timed and no separate erase cycle is required before write. The Write cycle is only  
enabled when it is in the Erase/Write Enable state. When CS is brought “high” follow-  
ing the initiation of a write cycle, the DO pin outputs the Ready/Busy status.  
1K (128 x 8 or 64 x 16)  
2K (256 x 8 or 128 x 16)  
4K (512 x 8 or 256 x 16)  
AT93C46  
AT93C56(1)  
AT93C66(2)  
The AT93C46/56/66 is available in 4.5V to 5.5V and 2.7V to 5.5V versions.  
Note: 1. This device is not recom-  
mended for new designs.  
Table 1. Pin Configuration  
8-lead PDIP  
Pin Name  
CS  
Function  
Please refer to AT93C56A.  
Chip Select  
2. This device is not recom-  
mended for new designs.  
Please refer to AT93C66A.  
CS  
SK  
DI  
1
2
3
4
8
7
6
5
VCC  
DC  
SK  
Serial Data Clock  
Serial Data Input  
Serial Data Output  
Ground  
ORG  
GND  
DI  
DO  
DO  
GND  
VCC  
ORG  
8-lead SOIC  
Power Supply  
Internal Organization  
CS  
1
8
7
6
5
VCC  
SK  
DI  
2
3
4
DC  
ORG  
GND  
DO  
Rev. 3264E–SEEPR–10/04  

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