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AT25128AW-10SI-2.7 PDF预览

AT25128AW-10SI-2.7

更新时间： 2024-11-05 04:33:07
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
21页 438K
描述
SPI Serial EEPROMs

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AT25128AW-10SI-2.7 数据手册

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Features  
• Serial Peripheral Interface (SPI) Compatible  
• Supports SPI Modes 0 (0,0) and 3 (1,1)  
• Data Sheet Describes Mode 0 Operation  
• Low-voltage and Standard-voltage Operation  
– 2.7 (VCC = 2.7V to 5.5V)  
– 1.8 (VCC = 1.8V to 5.5V)  
• 20 MHz Clock Rate (5V)  
• 64-byte Page Mode and Byte Write Operation  
• Block Write Protection  
– Protect 1/4, 1/2, or Entire Array  
• Write Protect (WP) Pin and Write Disable Instructions for  
Both Hardware and Software Data Protection  
• Self-timed Write Cycle (5 ms Max)  
• High-reliability  
– Endurance: 1 Million Write Cycles  
– Data Retention: >100 Years  
• Automotive Grade, Extended Temperature and Lead-free/Halogen-free  
Devices Available  
SPI Serial  
EEPROMs  
128K (16,384 x 8)  
256K (32,768 x 8)  
• 8-lead PDIP, 8-lead EIAJ SOIC, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-ball dBGA2 and  
8-lead SAP Packages  
• Die Sales: Wafer Form, Waffle Pack, and Bumped Die  
AT25128A  
AT25256A  
Description  
The AT25128A/256A provides 131,072/262,144 bits of serial electrically-erasable  
programmable read only memory (EEPROM) organized as 16,384/32,768 words of  
8 bits each. The device is optimized for use in many industrial and commercial appli-  
cations where low-power and low-voltage operation are essential. The devices are  
available in space saving 8-lead PDIP, 8-lead EIAJ SOIC, 8-lead JEDEC SOIC, 8-  
lead TSSOP, 8-ball dBGA2 and 8-lead SAP packages. In addition, the entire family is  
available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions.  
The AT25128A/256A is enabled through the Chip Select pin (CS) and accessed via  
a 3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and  
Serial Clock (SCK). All programming cycles are completely self-timed, and no sepa-  
rate Erase cycle is required before Write.  
8-lead SOIC  
8-lead PDIP  
Table 1. Pin Configurations  
CS  
SO  
1
2
3
4
8
7
6
5
VCC  
HOLD  
SCK  
SI  
CS  
SO  
1
2
3
4
8
7
6
5
VCC  
HOLD  
SCK  
SI  
Pin Name  
CS  
Function  
WP  
WP  
GND  
GND  
Chip Select  
SCK  
SI  
Serial Data Clock  
Serial Data Input  
Serial Data Output  
Ground  
8-lead SAP  
8-lead TSSOP  
VCC  
8
7
6
5
1
2
3
4
CS  
CS  
SO  
1
2
3
4
8
7
6
5
VCC  
HOLD  
SCK  
SI  
HOLD  
SCK  
SI  
SO  
SO  
WP  
GND  
WP  
GND  
VCC  
WP  
GND  
Bottom View  
8-ball dBGA2  
Power Supply  
Write Protect  
Suspends Serial Input  
No Connect  
8
7
6
5
1
2
3
4
CS  
VCC  
SO  
HOLD  
SCK  
WP  
GND  
HOLD  
NC  
SI  
Bottom View  
3368H–SEEPR–8/05  
1234567...21

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