Datasheet > 存储 > EEPROM> AT25128B

AT25128B

更新时间： 2024-09-15 08:37:31

品牌	Logo	应用领域
爱特美尔 - ATMEL		存储可编程只读存储器
页数	文件大小	规格书
24页	1027K
描述
serial electrically-erasable programmable read only memory

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中文翻译

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数据手册

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AT25128B 数据手册

Features

• Serial Peripheral Interface (SPI) Compatible

• Supports SPI Modes 0 (0,0) and 3 (1,1)

• Data Sheet Describes Mode 0 Operation

• Low-voltage and Standard-voltage Operation

– 1.8 (VCC = 1.8V to 5.5V)

• 20 MHz Clock Rate (5V)

• 64-byte Page Mode and Byte Write Operation

• Block Write Protection

SPI Serial

EEPROMS

– Protect 1/4, 1/2, or Entire Array

• Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software

Data Protection

• Self-timed Write Cycle (5 ms Max)

• High-reliability

128K (16,384 x 8)

– Endurance: 1 Million Write Cycles

– Data Retention: >100 Years

256K (32,768 x 8)

• Green (Pb/Halide-free/RoHS Compliant) Packaging Options

• Die Sales: Wafer Form, Waffle Pack, and Bumped Die

AT25128B

AT25256B

Description

The AT25128B/256B provides 131,072/262,144 bits of serial electrically-erasable pro-

grammable read only memory (EEPROM) organized as 16,384/32,768 words of 8 bits

each. The device is optimized for use in many industrial and commercial applications

where low-power and low-voltage operation are essential. The devices are available

in space saving 8-lead SOIC, 8-lead TSSOP, 8-ball VFBGA and 8-lead UDFN pack-

ages. In addition, the entire family is available in 1.8V (1.8V to 5.5V).

The AT25128B/256B is enabled through the Chip Select pin (CS) and accessed via a

3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and

Serial Clock (SCK). All programming cycles are completely self-timed, and no sepa-

rate Erase cycle is required before Write.

Table 0-1.

Pin Configurations

Function

8-lead SOIC

8-lead TSSOP

V_CC

Chip Select

HOLD

SCK

HOLD

SCK

Serial Data Clock

Serial Data Input

Serial Data Output

Ground

GND

8-lead UDFN

8-ball VFBGA

GND

V_CC

HOLD

SCK

HOLD

SCK

Power Supply

Write Protect

GND

HOLD

Suspends Serial Input

Bottom View

Block Write protection is enabled by programming the status register with top ¼, top ½

or entire array of write protection. Separate Program Enable and Program Disable

instructions are provided for additional data protection. Hardware data protection is

provided via the WP pin to protect against inadvertent write attempts to the status reg-

ister. The HOLD pin may be used to suspend any serial communication without

resetting the serial sequence.

8698B–SEEPR–3/10

12 3 4 5 6 7...24

中文翻译

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与AT25128B相关器件

型号	品牌	获取价格	描述	数据表
AT25128B-CUL-T	ATMEL	获取价格	serial electrically-erasable programmable read only memory
AT25128B-CUL-T	MICROCHIP	获取价格	IC EEPROM 128KBIT 20MHZ 8VFBGA
AT25128B-MAHL-E	MICROCHIP	获取价格	EEPROM, 16KX8, Serial, CMOS, PDSO8
AT25128B-MAHL-T	ATMEL	获取价格	serial electrically-erasable programmable read only memory
AT25128B-MAHL-T	MICROCHIP	获取价格	IC EEPROM 128KBIT 20MHZ 8UDFN
AT25128B-SSHL-B	ATMEL	获取价格	serial electrically-erasable programmable read only memory
AT25128B-SSHL-B	MICROCHIP	获取价格	IC EEPROM 128KBIT 20MHZ 8SOIC
AT25128B-SSHL-T	ATMEL	获取价格	serial electrically-erasable programmable read only memory
AT25128B-SSHL-T-899	MICROCHIP	获取价格	EEPROM, 16KX8, Serial, CMOS, PDSO8
AT25128B-XHL-B	ATMEL	获取价格	serial electrically-erasable programmable read only memory

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