Datasheet > AT17C512A-10PC

AT17C512A-10PC

更新时间： 2024-10-25 23:31:55

品牌	Logo	应用领域
其他 - ETC		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
15页	266K
描述
SERIAL EEPROM\|CMOS\|DIP\|8PIN\|PLASTIC

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中文翻译

获取价格

数据手册

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AT17C512A-10PC 数据手册

Features

• Serial EEPROM Family for Configuring Altera FLEX^®Devices

• Simple Interface to SRAM FPGAs

• EE Programmable 512-Kbit and 1-Mbit Serial Memories Designed to Store

Configuration Programs for Field Programmable Gate Arrays (FPGAs)

• Cascadable Read Back to Support Additional Configurations or Future

Higher-density Arrays

• Low-power CMOS EEPROM Process

• Programmable Reset Polarity

• Available in the Space-efficient Surface-mount PLCC and PDIP Packages for the

512-Kbit device and PLCC, PDIP and TQFP Packages for the 1-Mbit Device

• In-System Programmable via 2-wire Bus

• Emulation of Atmel’s AT24CXXX Serial EEPROMs

• Available in 3.3V 10% LV and 5V 5% C Versions

• System-friendly READY Pin

FPGA

Configuration

EEPROM

Memory

512-kilobit and

1-megabit

Description

The AT17C512A/010A and AT17LV512A/010A (high-density AT17A Series) FPGA

Configuration EEPROMs (Configurators) provide an easy-to-use, cost-effective con-

figuration memory for programming Altera FLEX^®devices. The AT17C512A/LV512A

devices are packaged in the popular 8-lead PDIP and the 20-lead PLCC; the

AT17C010A/LV010A are packaged in the popular 8-lead PDIP, the 20-lead PLCC and

the 32-lead TQFP. The AT17A Series family uses a simple serial-access procedure to

configure one or more FPGA devices. The AT17A Series organization supplies

enough memory to configure one or multiple smaller FPGAs. Using a feature of the

AT17A Series, the user can select the polarity of the reset function by programming

four EEPROM bytes. The AT17A parts generate their own internal clock by default and

can be used as a system “master” for loading the FPGA devices. The internal clock

can be disabled by the industrial programmer to allow the AT17A parts to be used as

system “slave”, so that the external devices will provide the clock for loading the FPGA

devices.

Altera Pinout

AT17C512A

AT17LV512A

AT17C010A

AT17LV010A

The Atmel devices also support a system-friendly READY pin for the 20-lead PLCC

package and a write protect mechanism for all packages. The READY pin is used to

simplify system power-up considerations. The WP1 pin is used to protect part of the

Configurator memory during in-system programming.

The AT17A Series Configurator can be programmed with industry-standard program-

mers, Atmel’s ATDH2200E Programming Kit or Atmel’s ATDH2225 ISP cable.

Rev. 0974E–08/01

12 3 4 5 6 7...15

中文翻译

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与AT17C512A-10PC相关器件

型号	品牌	获取价格	描述	数据表
AT17C512A-10PI	ETC	获取价格	Configuration EEPROM
AT17C65	ATMEL	获取价格	FPGA Configuration E2PROM
AT17C65-10CC	ETC	获取价格	SERIAL EEPROM\|CMOS\|LLCC\|8PIN\|PLASTIC
AT17C65-10CI	ETC	获取价格	Configuration EEPROM
AT17C65-10JC	ATMEL	获取价格	FPGA Configuration E2PROM
AT17C65-10JCT/R	ATMEL	获取价格	Configuration Memory, 64KX1, Serial, CMOS, PQCC20, PLASTIC, MS-018AA, LCC-20
AT17C65-10JI	ATMEL	获取价格	FPGA Configuration E2PROM
AT17C65-10JIT/R	ATMEL	获取价格	Configuration Memory, 64KX1, Serial, CMOS, PQCC20, PLASTIC, MS-018AA, LCC-20
AT17C65-10NC	ETC	获取价格	Configuration EEPROM
AT17C65-10NI	ATMEL	获取价格	Configuration Memory, 64KX1, 55ns, Serial, CMOS, PDSO8, 0.150 INCH, PLASTIC, SOIC-8

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