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AT17C65A-10JC PDF预览

AT17C65A-10JC

更新时间: 2024-11-23 22:47:55
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
11页 162K
描述
FPGA Configuration EEPROM

AT17C65A-10JC 数据手册

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Features  
EE Programmable 65,536 x 1, 131,072 x 1 and 262,144 x 1 bit Serial Memories Designed  
to Store Configuration Programs for Programmable Gate Arrays  
Simple Interface to SRAM FPGAs Requires Only One User I/O Pin  
Able to Configure with EPF6000 and EPF8000, Flex 10K FPGAs  
Cascadable To Support Additional Configurations or Future Higher-Density Arrays  
(17C128/256 only)  
Low-Power CMOS EEPROM Process  
Programmable Reset Polarity  
Available in Industry-Standard Pin-Compatible PLCC Package  
In-System Programmable via 2-Wire Bus  
Emulation of 24CXX Serial EEPROMs  
FPGA  
Available in 3.3V and 5V Versions  
Configuration  
EEPROM  
Description  
The AT17C65/128/256A and AT17LV65/128/256A (AT17A Series) FPGA Configura-  
tion EEPROMS (Configurator) provide an easy-to-use, cost-effective configuration  
memory for Field Programmable Gate Arrays. The AT17A Series is packaged in the  
popular 20-pin PLCC. The AT17A Series family uses a simple serial-access provides  
to configure one or more FPGA devices. The AT17A Series organization supplies  
enough memory to configure one or multiple smaller FPGAs. Using a special feature  
of the AT17A Series, the user can select the polarity of the reset function by program-  
ming a special EEPROM bit.  
65K, 128K and 256K  
AT17CxxxA  
AT17LVxxxA  
The AT17A Series is pin compatible with the industry standard configurator, and can  
be programmed with industry standard programmers.  
Pin Configurations  
20-Pin PLCC  
CLK (DCLK)  
4
5
6
7
8
18 SER_EN  
17 NC  
NC  
NC  
NC  
16 NC  
15 NC  
RESET/OE (RESET/OE)  
14 NC  
Rev. 0996A–07/98  

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