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AT17C65-10PI PDF预览

AT17C65-10PI

更新时间: 2024-11-23 22:47:55
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器
页数 文件大小 规格书
10页 153K
描述
FPGA Configuration E2PROM

AT17C65-10PI 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP8,.3
针数:8Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.87最长访问时间:55 ns
最大时钟频率 (fCLK):12.5 MHzJESD-30 代码:R-PDIP-T8
JESD-609代码:e0长度:9.398 mm
内存密度:65536 bit内存集成电路类型:CONFIGURATION MEMORY
内存宽度:1功能数量:1
端子数量:8字数:65536 words
字数代码:64000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:64KX1输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP8,.3封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:SERIAL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified座面最大高度:4.318 mm
最大待机电流:0.002 A子类别:EEPROMs
最大压摆率:0.01 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

AT17C65-10PI 数据手册

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Features  
E2 Programmable 65,536 x 1, 131,072 x 1, and 262,144 x 1 bit Serial Memories Designed  
To Store Configuration Programs For Programmable Gate Arrays  
Simple Interface to SRAM FPGAs Requires Only One User I/O Pin  
Compatible With AT6000 FPGAs, ATT3000 FPGA, EPF8000 FPGAs, ORCA FPGAs,  
XC2000, XC3000, XC4000, XC5000 FPGAs, MPA1000  
Cascadable To Support Additional Configurations or Future Higher-density Arrays  
(17C128 and 17C256 only)  
Low-power CMOS EEPROM Process  
Programmable Reset Polarity  
Available In the Space-efficient Plastic DIP or Surface-mount  
PLCC and SOIC Packages  
In-System Programmable Via 2-Wire Bus  
FPGA  
Configuration  
E2PROM  
Emulation of 24CXX Serial EPROMs  
Available in 3.3V ± 10% LV Version  
Description  
65K, 128K and 256K  
The AT17C65/128/256 and AT17LV65/128/256 (AT17 Series) FPGA Configuration  
EEPROMS (Configurator) provide an easy-to-use, cost-effective configuration mem-  
ory for Field Programmable Gate Arrays. The AT17 Series is packaged in the 8-pin  
DIP and the popular 20-pin PLCC and SOIC. The AT17 Series family uses a simple  
serial-access procedure to configure one or more FPGA devices. The AT17 Series  
organization supplies enough memory to configure one or multiple smaller FPGAs.  
Using a special feature of the AT17 Series, the user can select the polarity of the reset  
function by programming a special EEPROM bit.  
AT17C65  
AT17C128  
AT17C256  
The AT17 Series can be programmed with industry standard programmers.  
Pin Configurations  
20-pin PLCC  
20-Pin SOIC  
8-Pin DIP  
0391E-A–5/97  

AT17C65-10PI 替代型号

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EPC1064PC8 INTEL

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