Datasheet > ASM3P623S00B_1

ASM3P623S00B_1

更新时间： 2024-11-06 06:38:11

品牌	Logo	应用领域
PULSECORE		/
页数	文件大小	规格书
18页	633K
描述
Timing-Safe™ Peak EMI reduction IC

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中文翻译

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数据手册

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ASM3P623S00B_1 数据手册

May 2007

rev 0.4

ASM3P623S00B/C/J/E/F/K

Timing-Safe™ Peak EMI reduction IC

General Features

ASM3P623S00B/C/J is the eight-pin version and accepts

one reference input and drives out one low-skew clock.

•

Clock distribution with Timing-Safe™ Peak EMI

Reduction

All parts have on-chip PLLs that lock to an input clock on

the CLKIN pin. The PLL feedback is on-chip and is

obtained from the CLKOUT pad, internal to the device.

•

Input frequency range: 20MHz - 50MHz

Zero input - output propagation delay

Low-skew outputs

•

Output-output skew less than 250pS

Device-device skew less than 700pS

Multiple ASM3P623S00E/F/K devices can accept the same

input clock and distribute it. In this case, the skew between

the outputs of the two devices is guaranteed to be less than

700pS.

•

Less than 200pS cycle-to-cycle jitter

Available in 16pin, 150mil SOIC, 4.4mm TSSOP

(ASM3P623S00/E/F/K), and in 8pin, 150 mil

SOIC, 4.4mm TSSOP Packages

(ASM3P623S00B/C/J)

3.3V operation

Industrial temperature range

Advanced CMOS technology

The First True Drop-in Solution

All outputs have less than 200pS of cycle-to-cycle jitter.

The input and output propagation delay is guaranteed to be

less than 250pS, and the output-to-output skew is

guaranteed to be less than 250pS.

•

Refer “Spread Spectrum Control and Input-Output Skew

Functional Description

Table”

for deviations and Input-Output Skew for

ASM3P623S00B/C/J and the ASM3P623S00E/F/K devices

ASM3P623S00B/C/J/E/F/K is a versatile, 3.3V zero-delay

buffer designed to distribute high-speed Timing-Safe™

clocks with Peak EMI reduction. ASM3P623S00E/F/K

accepts one reference input and drives out eight low-skew

The ASM3P623S00B/C/J and the ASM3P623S00E/F/K are

available in two different packages, as shown in the

ordering information table.

clocks. It is available in

16pin package. The

Block Diagram

V_DD

SSON

SS%

PLL

Modulation

XIN/CLKIN

Crystal

Reference

Divider

XOUT

Oscillator

Feedforward

Divider

Phase

Loop

Filter

VCO

Detector

Feedback

Divider

CLKOUT

GND

PulseCore Semiconductor Corporation

1715 S. Bascom Ave Suite 200, Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018

www.pulsecoresemi.com

Notice: The information in this document is subject to change without notice.

12 3 4 5 6 7...18

中文翻译

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与ASM3P623S00B_1相关器件

型号	品牌	获取价格	描述	数据表
ASM3P623S00BF-08-SR	ALSC	获取价格	Zero Cycle Slip Peak EMI reduction IC
ASM3P623S00BF-08-SR	PULSECORE	获取价格	Timing-Safe™ Peak EMI reduction IC
ASM3P623S00BF-08-ST	ALSC	获取价格	Zero Cycle Slip Peak EMI reduction IC
ASM3P623S00BF-08-ST	PULSECORE	获取价格	Timing-Safe™ Peak EMI reduction IC
ASM3P623S00BF-08-TR	PULSECORE	获取价格	Timing-Safe™ Peak EMI reduction IC
ASM3P623S00BF-08-TR	ALSC	获取价格	Zero Cycle Slip Peak EMI reduction IC
ASM3P623S00BF-08-TT	ALSC	获取价格	Zero Cycle Slip Peak EMI reduction IC
ASM3P623S00BF-08-TT	PULSECORE	获取价格	Timing-Safe™ Peak EMI reduction IC
ASM3P623S00BG-08-SR	PULSECORE	获取价格	Timing-Safe™ Peak EMI reduction IC
ASM3P623S00BG-08-SR	ALSC	获取价格	Zero Cycle Slip Peak EMI reduction IC

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