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ASM2I99448-32-LR PDF预览

ASM2I99448-32-LR

更新时间: 2024-11-24 20:20:27
品牌 Logo 应用领域
PULSECORE 驱动逻辑集成电路
页数 文件大小 规格书
15页 594K
描述
Low Skew Clock Driver, 99448 Series, 12 True Output(s), 0 Inverted Output(s), PQFP32, LQFP-32

ASM2I99448-32-LR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:LQFP-32Reach Compliance Code:unknown
风险等级:5.76Is Samacsys:N
其他特性:ALSO OPERATES AT 3.3V SUPPLY系列:99448
输入调节:DIFFERENTIAL MUXJESD-30 代码:S-PQFP-G32
JESD-609代码:e0长度:7 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER功能数量:1
反相输出次数:端子数量:32
实输出次数:12最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):4.4 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.15 ns
座面最大高度:1.6 mm最大供电电压 (Vsup):2.625 V
最小供电电压 (Vsup):2.375 V标称供电电压 (Vsup):2.5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7 mm
Base Number Matches:1

ASM2I99448-32-LR 数据手册

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May 2005  
rev 0.3  
ASM2I99448  
3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer  
Features  
The ASM2I99448 is specifically designed to distribute  
LVCMOS compatible clock signals up to a frequency of  
350MHz. Each output provides a precise copy of the input  
signal with a near zero skew. The outputs buffers support  
driving of 50terminated transmission lines on the incident  
edge: each output is capable of driving either one parallel  
terminated or two series terminated transmission lines.  
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12 LVCMOS compatible clock outputs  
Selectable LVCMOS and differential LVPECL  
compatible clock inputs  
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Maximum clock frequency of 350MHz  
Maximum clock skew of 150pS  
Synchronous output stop in logic low state  
eliminates output runt pulses  
Two selectable, independent clock inputs are available,  
providing support of LVCMOS and differential LVPECL  
clock distribution systems. The ASM2I99448 CLK_STOP  
control is synchronous to the falling edge of the input clock.  
It allows the start and stop of the output clock signal only in  
a logic low state, thus eliminating potential output runt  
pulses. Applying the OE control will force the outputs into  
high–impedance mode.  
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High–impedance output control  
3.3V or 2.5V power supply  
Drives up to 24 series terminated clock lines  
Ambient temperature range –40°C to +85°C  
32–Lead LQFP & TQFP packaging  
Supports clock distribution in networking,  
telecommunication and computing applications  
Pin and Function compatible to MPC9448 and  
MPC948  
All inputs have an internal pull–up or pull–down resistor  
preventing unused and open inputs from floating. The  
device supports a 2.5V or 3.3V power supply and an  
ambient temperature range of –40°C to +85°C. The  
ASM2I99448 is pin and function compatible but  
performance–enhanced to the MPC948.  
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Functional Description  
The ASM2I99448 is a 3.3V or 2.5V compatible, 1:12 clock  
fanout buffer targeted for high performance clock tree  
applications. With output frequencies up to 350 MHz and  
output skews less than 150 pS, the device meets the needs  
of most demanding clock applications.  
Alliance Semiconductor  
2575, Augustine Drive Santa Clara, CA Tel: 408.855.4900 Fax: 408.855.4999 www.alsc.com  
Notice: The information in this document is subject to change without notice.  

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