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ASEMPLV-156.2500MHZ-LR-PD-T3 PDF预览

ASEMPLV-156.2500MHZ-LR-PD-T3

更新时间: 2024-09-16 03:28:19
品牌 Logo 应用领域
ABRACON 机械振荡器
页数 文件大小 规格书
6页 3915K
描述
LVDS Output Clock Oscillator, 156.25MHz Nom, ROHS COMPLIANT, ULTRA MINIATURE, PLASTIC, QFN, 6 PIN

ASEMPLV-156.2500MHZ-LR-PD-T3 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:ActiveReach Compliance Code:compliant
风险等级:5.42其他特性:STAND-BY; POWER DOWN; ENABLE/DISABLE; TAPE AND REEL
频率调整-机械:NO频率稳定性:25%
JESD-609代码:e4安装特点:SURFACE MOUNT
标称工作频率:156.25 MHz最高工作温度:85 °C
最低工作温度:-40 °C振荡器类型:LVDS
输出负载:100 OHM物理尺寸:3.2mm x 2.5mm x 0.85mm
最大供电电压:3.6 V最小供电电压:2.25 V
表面贴装:YES最大对称度:52/48 %
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)

ASEMPLV-156.2500MHZ-LR-PD-T3 数据手册

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MEMS CLOCK OSCILLATOR  
ASEMP  
Life Size  
RoHS/RoHS II compliant  
Pb  
ASEMP  
3.2 x 2.5 x 0.85 mm  
Moisture Sensitivity Level – MSL 1  
APPLICATIONS:  
FEATURES:  
• Low Power Consumption for high speed communication  
• Exceptional Stability Over Temp. at -40 to +85°C, ±15ppm  
• Extended Automotive Grade Temp. stability at -55 to +125°C, ±25ppm  
• MIL-STD-883 shock and vibration compliant  
• Durable QFN Plastic Compact Packaging  
• Storage Area Networks  
(SATA, SAS, Fiber Channel)  
• Passive Optical Networks (EPON,  
10G-EPON, GPON, 10G-PON)  
• Ethernet (1G, 10GBASE-T,/KR/LR/SR, FCoE  
• PCI Express  
• Standby or Disable Tri-state function  
• Low jitter (Period jitter RMS and Phase jitter RMS)  
• Display port  
• High power supply noise reduction, -50dBc  
STANDARD SPECIFICATIONS:  
Common Key Electrical Specifications – CMOS, LVPECL, LVDS, and HCSL  
Parameters  
Minimum  
Typical  
Maximum  
Units  
Notes  
-20 ~ +70°C  
-40 ~ +85°C  
-40 ~ +105°C  
-55 ~ +125°C  
CMOS  
CMOS  
LVPECL  
LVDS  
2.3000*  
170.0000  
3.3000*  
2.3000*  
2.3000*  
2.3000*  
170.0000  
460.0000  
460.0000  
460.0000  
Commercial, Industrial  
temp. range  
Commercial, Industrial  
temp. range  
Commercial, Industrial  
temp. range  
Frequency Range  
MHz  
HCSL  
Operating Temperature  
Storage Temperature  
Overall Frequency Stability  
Supply Voltage (Vdd)  
Startup Time  
-20  
-55  
-50  
+70  
+150  
+50  
+3.6  
5
°C  
°C  
See options  
ppm See options  
V
ms  
+2.25  
20  
5
5
22  
ns  
ms  
ns  
STD (Tri-state)  
PD option (Power Down)  
Enable Time  
Disable Time  
Disable Current  
20  
STD (Tri-state)  
PD option (Power Down)  
40kpull-up resister  
embedded  
mA  
V
0.095  
"1" (VIH0.75*Vdd) or Open: Oscillation  
Tri-state Function (Standby/Disable)  
Aging  
"0" (VIL<0.25*Vdd) : Hi Z  
-5.0  
+5.0  
ppm First year  
* For 2.3000MHz < F0 < 9.9999MHz, 6-8 weeks lead-time applies  
Key Electrical Specifications – CMOS  
Parameters  
Supply Current (Idd)  
Minimum  
Typical  
Maximum Units  
Notes  
31  
35  
mA CL=15pF, 125MHz  
VOH  
VOL  
Tr  
0.9*Vdd  
V
V
ns  
ns  
%
Output Logic Level  
I=±6mA  
0.1*Vdd  
Rise Time  
Fall Time  
Duty Cycle  
1.1  
1.3  
2.0  
2.0  
55  
2
2
2
CL=15pF  
20% to 80%  
Tf  
45  
200kHz ~ 20MHz@125MHz  
100kHz ~ 20MHz@125MHz  
12kHz ~ 20MHz@125MHz  
0.30  
0.38  
1.70  
3.0  
Integrated Phase Jitter (JPH)  
ps  
ps  
Period Jitter RMS (JPER  
)
REVISED: 12.6.2018  
5101 Hidden Creek Ln Spicewood TX 78669  
Phone: 512-371-6159 | Fax: 512-351-8858  
For terms and conditions of sales, please visit: www.abracon.com  
ABRACON IS  
ISO9001-2015  
CERTIFIED  
LLC  

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